Instruction pipelines, Computer Engineering

Instruction Pipelines

As discussed previous, the stream of instructions in the instruction implementation cycle, can be realized through a pipeline where overlapped implementation of different operations are performed. The process of implenting the instruction involves the following main steps:

  • Fetch the instruction by the main memory
  • Decode the instruction
  • Fetch the operand
  • Implement the decoded instruction

These four steps become the candidates for phases for the pipeline, which we state as instruction pipeline (It is given in Figure).

                                                471_Instruction Pipelines.png

                                                          Figure: Instruction Pipeline

While, in the pipelined implementation, there is overlapped implementation of operations, the four phases of the instruction pipeline will work in the overlapped manner. Firstly, the instruction address is fetched from the memory to the first phase of the pipeline. The first phase fetches the instruction and provides its output to the second phase. Whereas, the second phase of the pipeline is decoding the instruction, the first phase gets another input and provides the next instruction. When the first instructions have been decoded in the second phase, then its output is fed to the third phase. When the third phase is fetching the operand for the first instruction, then the second phase gets the second instruction and the first phase gets input for another instruction and so on. In this manner, the pipeline is implementing the instruction in an overlapped way increasing the speed of execution and throughput.

The situation of these overlapped operations in the instruction pipeline can be demonstrated through the space-time diagram. In Figure, firstly we show the space-time diagram for non-overlapped implementation in a sequential environment and then for the overlapped pipelined environment. It is clear from the two diagrams that in non-overlapped implementation, results are achieved only after 4 cycles while in overlapped pipelined implementation, after 4 cycles, we are receiving output after every cycle. Soon in the instruction pipeline, the instruction cycle has been deduced to ¼ of the sequential implementation.

                                      879_Space-time diagram for Non-pipelined Processor.png

                                                Space-time diagram for Non-pipelined Processor

                                    967_Space-time diagram for Overlapped Instruction pipelined Processor.png

                                              Space-time diagram for Overlapped Instruction pipelined Processor

Posted Date: 3/2/2013 7:06:09 AM | Location : United States







Related Discussions:- Instruction pipelines, Assignment Help, Ask Question on Instruction pipelines, Get Answer, Expert's Help, Instruction pipelines Discussions

Write discussion on Instruction pipelines
Your posts are moderated
Related Questions
Add +25 to -15 by using 2's complement ? Ans. Firstly convert the numbers 25 and 15 in its 8-bit binary equivalent and determine the 2's complement of 15, after that add +25 to -

All AWT event listeners expand the java.util.EventListener interface.

What is assembly language? Assembly language : It is a family of low-level language for microprocessors, programming computers, microcontrollers etc. All are implement a symbo

Nanoprogramming:  Second compromise: nanoprogramming  it use a 2-level control storage organization  Top level is a vertical format memory  Output of the top level

What are several issues for selecting best workarounds in multiple inheritances? Some restrictions methods are used. Use two approaches of delegations, which is an implementati

Proof by Contradiction - Artificial intelligence So, both backward chaining andforward chaining have drawbacks. Another approach is to think regarding proving theorems by contr

The implementation of a (non-recursive) binary search of an array. The assumption is that a given array is sorted. We want to see if a particular value, that we'll call the target

What are the advantages of Hierarchical Networks? Hierarchical networks are able of handling heavy traffic where needed, and at similar time use minimal number of trunk groups

Illustrate about object oriented development object oriented development is not direct way of system development as in this approach a holistic view of application domain is co

Problem a) Distributed network architecture is whereby services are executed and distributed  among various computers. Give two advantages and two disadvantages of the distrib