Explain the Asynchronous Up-Down Counters?

In some applications a counter must be able to count both down and up and the circuit below is a 3-bit up-down counter. It counts down or up depending on the status of the control signals UP and DOWN When the UP input is at 1 and the DOWN input is at 0 the NAND network between FF0 and FF1 will gate the non-inverted output (Q) of FF0 into the clock input of FF1. Likewise, Q of FF1 will be gated throughout the other NAND network into the clock input of FF2, Therefore the counter will count up.

 

When the control input UP is at 0 and DOWN is at 1 and the inverted outputs of FF0 and FF1 are gated into the clock inputs of FF1 and FF2 respectively. If the flip-flops are primarily reset to 0's then the counter will go through the following sequence as input pulses are applied.

Posted Date: 6/12/2013 3:37:07 AM | Location : United States

Ask an Expert

Related Discussions:- Explain the asynchronous up-down counters, Assignment Help, Ask Question on Explain the asynchronous up-down counters, Get Answer, Expert's Help, Explain the asynchronous up-down counters Discussions

Write discussion on Explain the asynchronous up-down counters
Your posts are moderated

Write your message here..

Related Questions

Electrical engineering, 4. Modify the circuit designed for question 3 to pr... 4. Modify the circuit designed for question 3 to provide an emergency stop which will park both cylinders in the extended position (i.e. A + B +). 5. Modify the circuit designed fo

Balanced score card or bsc, Balanced Score Card or BSC We see in which... Balanced Score Card or BSC We see in which the traditional model does not reflect the significance of intangible assets, their capturing and measuring mechanism and does not r

Conveyor, The FESTO conveyer consists of 600mm belt driven by a 24V d.c. mo... The FESTO conveyer consists of 600mm belt driven by a 24V d.c. motor at a rate of 13 seconds per metre. A relay on the FESTO panel controls the motor operation and is wired for sou

Sketch the output waveform for the synchronous counter, Q. Consider a serie... Q. Consider a series-carry synchronous counter with T flip-flops shown in Figure in which the AND gates carry forward the transitions of the flip-flops, thereby improving the speed

Electrical Engineering Design Report, hi there i just need help for Electri... hi there i just need help for Electrical Engineering Design Report about any topic (prefer charger and inverter) which should be include Summary,Table of contents,Introduction,Body

Determine the voltage transfer function, Q. Determine the voltage transfer ... Q. Determine the voltage transfer function of the low pass filter circuit shown in Figure, and find the expression for ω 0 .

Armature reaction, is armature reaction good or bad for dc generator? is armature reaction good or bad for dc generator?

Superposition theorem, how do you work it out if there are 3 sources in par... how do you work it out if there are 3 sources in parallel?

Exponentially weighted moving average, 1. The Excel file contains daily clo... 1. The Excel file contains daily closes for the S&P/TSX composite index from January 2, 2008 to December 31, 2010. Assuming that December 31, 2010 is the current day. A) Using the

Energy stored in a magnetic field , Energy stored in a magnetic field ... Energy stored in a magnetic field Consider a circuit consisting of a voltage supply,  switch,  resistor  and  a  coil  of  N turns wound on a toroid of length l, all in series