Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. Explain about Hamming error correcting code?
Richard Hamming at Bell Laboratories worked out this code. We will only introduce this code with help of an illustration for 4 bit data. Let's presume a 4 bit number b4, b3, b2, b1. In order to create a simple error detection code which detects error in one bit only we can just add an odd parity bit. Though if we want to find which bit is in error then we may have to employ parity bits for different combinations of these 4 bits in such a way that a bit error can be recognized uniquely. For illustration we can create four parity sets as below
Source Parity Destination Parity
b1, b2, b3 P1 D1
b2, b3, b4 P2 D2
b3, b4, b1 P3 D3
b1, b2, b3, b4 P4 D4
Now very interesting phenomenon can be noticed in above displayed parity pairs. Assume data bit b1 is in error on transmission then it will cause alteration in destination parity D1, D3, D4.
ERROR IN Cause change in Destination Parity
(One bit only)
b1 D1, D3, D4
b2 D1, D2, D4
b3 D1, D2, D3, D4
b4 D2, D3, D4
Figure: The error detection parity code mismatch
So by simply comparing parity bits of source and destination we can recognize that which of four bits is in error. This bit then can be complemented to eliminate error. Please note that even source parity bit can be in error on transmission but under assumption that just one bit (irrespective of data or parity) is in error it would be detected as just one destination parity would be different. What should be length of error detection code that detects error in one bit? Before responding this question we have to look in comparison logic of error detection. Error detection is done by comparing two ‘i’ bit error detection and correction codes fed to comparison logic bit by bit (see figure below). Let’s have comparison logic that produces a zero if compared bits are same or else it generates a one. Consequently if similar Position bits are similar then we obtained zero at that bit Position however if they are dissimilar that is this bit position may point to an error then this Particular bit position would be marked as one. This way a matching word is built. This matching word is ‘i’ bit long so can signify 2i values or combinations.
Explain the architecture of SS7 . A block schematic diagram of the CCITT no. 7 signaling system is demonstrated in figure. Signal messages are passed by the central proces
third partial product of 13*11 in binary
Over fitting Considerations - artificial intelligence Left unexamined , back propagation in multi-layer networks may be very susceptible to over fitting itself to the
Q. Show the Code Conversion with example? The conversion of data from one form to another is required. Consequently we will discuss an illustration for converting a hexadecimal
Multiple Instruction and Multiple Data stream (MIMD): In this categorization, numerous processing elements and multiple control units are ordered as in MISD. However the differ
Q. Determine the use of LOOP instruction? Program: This program prints the alphabets (A-Z) ; Register used: AX, CX, DX CODE SEGMENT ASSUME: CS: CODE. MAINP:
The 2's complement of the number 1101110 is ? Ans. 1's complement of 1101110 is = 0010001 ans hence 2's complement of 1101110 is = 0010001 + 1 = 0010010.
Ask question #Minimum 100 wordswhat is the .role of internet in progressing sciences accepted#
Q. What is Access latency and Rotation Speed? Access latency: A disk access basically moves the arm to selected cylinder and waits for rotational latency that may take less t
MINI PROJECT ON UNIVERSITY SCHEMA
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd