Exdplain instruction buffers, Computer Engineering

Instruction buffers

For taking the complete advantage of pipelining pipelines must be filled continuously. So instruction fetch rate must be matched with pipeline consumption rate. To accomplish this instruction buffers are used. Instruction buffers in CPU have high speed memory for accumulating the instructions. The instructions are prefetched in buffer from main memory. Alternative for the instruction buffer is cache memory between main memory and CPU. The benefit of cache memory is it can be used for both data and instruction however cache needs more complicated control logic than instruction buffer.  Some pipelined computers have implemented both.


Posted Date: 7/13/2013 2:04:49 AM | Location : United States

Related Discussions:- Exdplain instruction buffers, Assignment Help, Ask Question on Exdplain instruction buffers, Get Answer, Expert's Help, Exdplain instruction buffers Discussions

Write discussion on Exdplain instruction buffers
Your posts are moderated
Related Questions
what is Ambiguity in single inheritance

Q. What are the elements of an instruction? As the function of instruction is to communicate to CPU what to do it needs a minimum set of communication such as:  What op

Write a short notes on storage classes in C. Every variable and function in C has two attributes : type and storage class. The four storage classes are automatic, external, reg

The VLSI technology is still developing. More and more powerful microprocessors and more storage space now are being put in single chip. One question that we have still not conside

Enumerate the data structures used during the first pass of the assembler. Indicate the fields of these data structures and their purpose/usage. Three main data structures used

Data Stream and Instruction Stream The term 'stream' refers to an order or flow of either data operated or instructions on by the computer. In the complete chain of instructi

Illustrate functional diagram of digital multiplexer . Write the scheme of a 4- input multiplexer using basic gates (AND/OR/NOT) and explain its operation. Ans: Multiple

Program Level This is usually the dependability of the operating system, which runs processes simultaneously. Different programs are evidently independent of each other. So par

In a two stage network there are 512 inlets and outlets, r=s=24. If the probability that a given inlet is active is 0.8, calculate: Blocking probability Given: N =M =512,