Bus master - computer architecture, Computer Engineering

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Bus Master:

In  computer system,  bus  mastering  is  a attribute  supported  by  various  bus  architectures  that  enables  a  device linked to the bus to initiate transactions .The process in bus communication that select between linked devices contending for control of the shared bus; the device currently in control of the bus is frequently termed the bus master. Devices can be allocated differing priority levels that will decide the option of bus master in case of contention. A device not at present bus master might request control of the bus before trying to initiate a data transfer by means of the bus. The normal protocol is that only 1 device may be bus master at any time and that all other devices act as slaves to this master. Only a bus master canstart a normal data transfer on the bus; slave devices respond to commands issued by the present bus master by supplying data requested or accepting data sent.

  • Centralized arbitration
  • Distributed arbitration

2182_Bus Master.png

 A simple arrangement for bus arbitration using a daisy chain

  • One bus-grant line and one bus-request line form a daisy chain.
  • This arrangement leads to considerable flexibility in formative the order.
  • The bus arbiter can be the processor or a distinct unit connected to the bus.

1259_Bus Master1.png



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