Show how the value ascii miriam is stored in memory

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Reference no: EM13333107

1. Show how the value ASCII "MIRIAM" is stored in memory in Big Endian format starting at location 100 hexadecimal. Assume that each memory location stored two ASCII characters.

 

Memory Location

Value Stored

100

 

101

 

102

 

 

2. A given microprocessor has words of 1 byte.  What is the smallest and largest integer that can be represented in the following representations?

            a) unsigned

 

            b) sign- magnitude

 

            c) ones complement

 

            d) twos complement

 

            e) unsigned packed decimal

 

            f) signed packet decimal

 

3. Compare zero-, one, two-, and three- address machines by writing programs to compute

                        X = (A + B x C)/(D - E x F)

for each of the four machines.  Do not modify the values of A, B, C, D, E, or F.  If necessary, use a temporary location T to store the intermediate results.

The instructions available for use are as follows:

 

0 Address

1 Address

2 Address

3 Address

PUSH M

LOAD M

MOVE (XßY)

MOVE (XßY)

POP M

STORE M

ADD (XßX + Y)

ADD (XßY + Z)

ADD

ADD M

SUB (XßX - Y)

SUB (XßY - Z)

SUB

SUB M

MUL (XßX x Y)

MUL (XßY x Z)

MUL

MUL M

DIV (XßX / Y)

DIV (XßY / Z)

DIV

DIV M

 

 

 

4. Convert the following formulas from reverse Polish to infix:

            a) AB +C + D x

            b) ABCDE + x x /

5. Convert the following formulas from infix to reverse Polish:

a) A + B + C + D + F

b) (A x B) + (C x D) + E

6. Assume a stack-oriented processor that includes the stack operations PUSH and POP.  Arithmetic operations automatically involve the top one or two stack elements.

Beginning with an empty stack, what stack elements remain after the following instructions are executed?

 

Instruction

Stack (top number on left of stack)

PUSH 4

 

PUSH 7

 

PUSH 8

 

ADD

 

PUSH 10

 

SUB

 

MUL

 

 

 

7.  Consider a processor in which a two-word instruction is stored at location 100 with its address field at location 101 as shown below.

Memory

        Registers                             Address           Content

PC =100

 

100

Load to AC;  Mode

 

 

101

Address = 600

 

R1 = 300

 

102

Next instruction

 

 

:

:

 

XR = 200

 

200

300

 

 

:

:

 

BR = 300

 

300

700

 

:

:

AC = ?

 

400

200

 

:

:

 

 

500

100

 

 

:

:

 

 

600

400

 

 

:

:

 

 

702

500

 

 

:

 

 

 

800

900

 

 

:

:

 

 

900

800

 









 

The first word of the instruction specifies the operation code and mode; the second word specifies the address part.

The values of the program counter (PC register), a general register (R1), the index register (XR), the base register (BR), and certain addresses in memory are as shown below.

 

Evaluate the effective address and the value that is loaded into the AC for the following addressing modes:

 

 

Addressing Mode

Effective address

Value of the operand loaded into the AC

a)

Immediate

 

 

b)

Direct addressing

 

 

c)

Indirect addressing

 

 

d)

Register

 

 

e)

Register indirect

 

 

f)

Relative address

 

 

g)

Base register addressing

 

 

h)

Indexed addressing

 

 

 

 

Reference no: EM13333107

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