Write the truth table for a clocked J-K flip-flop, Computer Engineering

Write the truth table for a clocked J-K flip-flop that is triggered by the positive-going edge of the clock signal.

Ans.

230_JK flip flop.png

Logic diagram of JK flip flop

Truth Table for clocked JK flip flop

clock	J	K	Q(t+1)
0	X	X	Q(t)
0 1	0	0	Q(t)
-do-	1	0	1
-do-	0	1	0
-do-	1	0	Q'(t)

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