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Q. Write notes on clamping ?
Clamping network shifts (clamps) a signal to a different d.c level, that is it introduces a d.c. level to an a.c signal. Hence, the clamping network is also known as d.c reference signal to the video signal. The clamping network has the various circuit components like a diode, a capacitor and a resistor. The time constant for the circuit G=RC must be large so that the voltage across the capacitor does not discharge significantly when the diode is not conducting.
In the clamper circuit the diodes are assumed to be ideal. A square waveform with maximum amplitude of V is given as the input to the network. During the positive half cycle, the diode conducts, ie it acts like a short circuit. The capacitor charges to V volts. During this interval, the output which is taken across the short circuit will be V0= 0 V. During the negative half cycle, the diode is open. The output voltage can be found out by applying Kirchoff's Law.
-V-V-V0 = 0
Therefore, V0= -2V
The analysis of the clamper circuit can be done as follows. Determine the portion of the input signal that forward biases the diode. When the diode is in short circuit condition, the capacitor charges up to a level determined by the voltage across the capacitor in its equivalent open circuit state. During the open circuit condition of the diode, it is assumed that the capacitor will hold on to all its charge and therefore voltage. In the clamper networks, the total swing of the output is equal to the total swing of the input signal.
Q. When the J and K inputs of a JKFF are tied to logic 1, this device is known as a divide-by-2 counter. Complete the timing diagram shown in Figure for this counter.
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