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Which TTL logic gate is used for wired ANDing ?Ans. Open collector output, TTL logic gate is used.
Register Addressing mode - computer architecture: Register Addressing: Register addressing mode is same to direct addressing. Only difference in between is that the addre
Q. How to Add Cell Padding? As you can see, text is too close to the edges of the cells. You will add padding to the cells to leave room between text and cells. 1. Click in
a. Explain the hardware mechanism for handling multiple interrupt requests. b. What are handshaking signals? Describe the handshake control of data transfer during input and out
What is PBO and PAI events? PBO- Process before Output-It verifies the flow logic before displaying the screen. PAI- Process after Input-It verifies the flowlogic after
How exceptions are handled in java? Exception handing In Java: A java exception is an object which describes an exceptional condition which has occurred in a piece of code.
Web authoring tools CGI was considered excellent in the beginning since it was also open standard. The only drawback it suffered was that it was slow. Major software developers v
Q. Instruction per cycle in RISC? One instruction per cycle: A machine cycle is total time taken to fetch two operands from registers perform ALU operation on them and store re
SS7 Protocol uses: (A) Out of band signalling. (B) Associated signalling. (C) Speech control signalling. (D) No signalling. Ans: SS7 Protocol uses Out of
Data packets: USB communication takes the form of packets. Originally, all packets are sent from the host, using the root hub and possibly more hubs, to components. Some of th
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