What is indirect addressing mode explain, Computer Engineering

Assignment Help:

Q. What is Indirect Addressing Mode explain?

Indirect Addressing Mode

In the indirect addressing modes operands employ registers to point to locations in memory. So it is essentially a register indirect addressing mode. This is a convenient mode for handling arrays / strings etc. For this mode two kinds of registers are used. These are:

  • Base register BX, BP
  • Index register SI, DI

BX comprises offset/ pointer in Data Segment

BP comprises offset/ pointer in Stack segment.

SI comprises offset/pointer in Data segment.

DI comprises offset /pointer in extra data segment.

There are 5 different kinds of indirect addressing modes:

1.  Register indirect

2.  Based indirect

3.  Indexed indirect

4.  Based indexed

5.  Based indexed with displacement.

Mode

Description

Example

Register Indirect

Indirect operands are particularly powerful when processing list of arrays, since a base or an indexregister can be modified at runtime.

MOV BX, OFFSET ARRAY 

; point to start of array

MOV AL,[BX] 

; get first element

INC BX 

; point to next

MOV DL,[BX] 

; get second element

The brackets around BX signify

That we are referring to the contents of memory location, using the address stored in BX.

In the subsequent illustration, three bytes in an array are added together:

MOV SI,OFFSET ARRAY 

; address of first byte

MOV AL,[SI] 

; move the first byte to AL

INC SI 

; point to next byte

ADD AL,[SI] 

; add second byte

INC SI 

; point to the third byte

ADD AL,[SI] 

; add the third byte

Based Indirectand Indexed

Indirect

Based and indirect addressing modes are employed in the same way. The contents of a register are added to a displacement to produce an effective address. The register should be one of the following: SI, DI, BX or BP. If the registers used for displacement are base registers, BX or BP, it is said to be base addressing or else it is termed as indexed addressing. A displacement is either a number or a label whose offset is known at assembly time. The notation can take various equivalent forms. If BX, SI or DI is used, the effective address is generally an offset from the DS register; BP on the other hand generally comprises an offset from SS register.

; Register added to an offset

MOV DX, ARRAY[BX]

MOV DX,[DI + ARRAY]

MOV DX,[ARRAY + SI]

; Register added to a constant

MOV AX,[BP + 2]

MOV DL,[DI - 2] ; DI + (-2)

MOV DX,2[SI]

Based Indexed

In this kind of addressing the operand's effective address is formed by combining a base register with an index register.

MOV AL,[BP] [SI]

MOV DX,[BX + SI]

ADD CX,[DI] [BX]

; Two base registers or two

; index registers cannot be

; combined, so the 

; following would be 

; incorrect:

MOV DL,[BP + BX] 

; error : two base registers

MOV AX,[SI + DI] 

; error : two index registers

Based Indexed with Displacement

The operand's effective address is formed by combining a base register, an

Index register, and a displacement. 

MOV DX,ARRAY[BX][SI]

MOV AX, [BX + SI +

ARRAY]

ADD DL,[BX + SI + 3] 

SUB CX, ARRAY[BP +

SI]

Two base registers or two

index registers can't be

combined so the

following will be

incorrect:

MOV AX,[BP + BX + 2]

MOV DX,ARRAY[SI +

DI]


Related Discussions:- What is indirect addressing mode explain

Is it possible to QuantifySoftware Engineering Risks using S, 1. Introducti...

1. Introduction to Software Metrics in Software Engineering.? 2. Role of direct and indirect measures in software process management? 3. Stance taken and justification? 4. Conclusi

What is assembly condition codes, Condition codes are the list of possible ...

Condition codes are the list of possible conditions that can be tested through conditional instructions. Typical conditional instructions have: conditional branches, conditional ju

Which TTL logic gate is used for wired anding, Which TTL logic gate is used...

Which TTL logic gate is used for wired ANDing ? Ans. Open collector output, TTL logic gate is used.

What are the important tools of a three-tier client server, What are the im...

What are the important tools of a three-tier client server? In a three-tier or multi-tier environment, there the client implements the presentation logic or the client. The bus

Expalin massively parallel system and scalability, Massively Parallel Syste...

Massively Parallel System Indicates to a "parallel computer system" involving a huge number of processors. The numbers in a huge number of processors keeps increasing and curre

Units of artificial neural networks, Units of artificial neural networks: ...

Units of artificial neural networks: However the input units simply output the value that was input to them from the example to be propagated. So every other unit in a network

Interrupt - driven input-output, Q. Interrupt - Driven Input-output? Pr...

Q. Interrupt - Driven Input-output? Problem with programmed I/O is that processor has to wait a long time for I/O interface to see whether a device is free or waits until compl

Operating system, define request edge and assignment edge

define request edge and assignment edge

Determine about the programmable read only memory, Programmable read only m...

Programmable read only memory (PROM) A PROM is a memory chip on which data can be written only one time. Once a program has been written onto a PROM, it's permanent. Unlike RAM

Determine the indicator variables in a random forest, Given a dataset with ...

Given a dataset with 1000 rows and 25 predictors labeled x1, x2, ...,x25 to classify into two classes {a, b}. Consider the small random forest with 3 trees and one split in each tr

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd