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What is EDO RAM
A minor modification to the structure of the DRAM changes the device into an EDO (extended data output) DRAM device. In EDO memory, any memory access, including a refresh, stores 256 bits selected by RAS' into latches. These latches hold the subsequent 256 bits of information, so in most programs, that are sequentially executed, that data are available without any wait states.
The number of control lines for 32 to 1 multiplexer is ? Ans. For 32 (2 5 ) the number of control lines and to select one i/p between them total 5 select lines are needed.
The output of SR flip flop when S=1, R=0 is ? Ans. When for the SR flip-flop S=set i/p R=reset i/p, as S=1, R=0, Flip-flop will be set means output will be one.
tCAS is the number of clock cycles required to access a particular column of data in SDRAM. CAS latency is the column address strobe time, sometimes referred to as tCL.
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