Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. What do you mean by Daisy chain?
This scheme provides a hardware poll. With this scheme, an interrupt acknowledge line is chain by different interrupt devices. All I/O interfaces share a common interrupt request line. When processor senses an interrupt it sends out an interrupt acknowledgement. This signal passes via all I/O devices till it gets to requesting device. First device that has made interrupt request so senses signal and responds by putting in a word that is generally an address of interrupt servicing program or a unique identifier on data lines. This word is also called as interrupt vector. This address or identifier in turn is used for selecting an appropriate interrupt-servicing program. Daisy chaining has an in-built priority scheme that is determined by sequence of devices on interrupt acknowledge line.
Define deadlock. A process requests resources; if the resources are not available at that time, the method enters a wait state. Waiting processes might never again change state
Discuss in detail about Micro computer A microcomputer's CPU is a microprocessor. The microcomputer was originated in late 1970s. The first microcomputer was built around 8-bit
to find the area under curve
Call request signal is: (A) Seize signal (B) Idle state signal (C) Line identification signal (D) Called subscriber alert signal Ans: Call request
Q. Define the Register Length? Register Length: Asignificant characteristic related to registers is length of a register. Generally the length of a register is dependent on it
Characteristics of computer storage: Storage technologies at all of levels of the storage hierarchy may be distinguished by evaluating particular core characteristics and alon
Register-to-Register Architecture : In this organization, results and operands are accessed not directly from the main memory by the scalar or vector registers. The vectors which a
RISC architecture - computer architecture: What is reduced regarding it? The answer of this question is that to make all instructions the equal length the number of bits that
Let's design a synchronous BCD counter. A BCD counter follows a sequence of ten states and returns to 0 after count of 9. These counters are also known as decade counters. This typ
Design-Centered Virtual Manufacturing This gives manufacturing information to the designer throughout the design phase. In this observing the short term and long time definitio
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd