The concept of process-parallel computing, Computer Engineering

Assignment Help:

The Concept of Process

Informally, a method is a program in execution, behind the program has been loaded in the main memory. However, a method is more than just a program code. A process has its own value of program counter, address space, threads, and temporary variables, file handles, security attributes, return addresses etc.

Each process has a life cycle, which consists of execution, creation and termination phases.  A process may create numerous new processes, which in turn may also make a latest process. In UNIX operating system surroundings, a new process is shaped by fork system call. Process creation needs the subsequent four actions:

i)  Setting up the process description: Setting up the process description need the design of a Process Control Block (PCB). A PCB includes basic data such as, process status, owner, description of the allocated address space, process identification number, and much other implementation dependent process explicit information essential for process management.

ii) Allocating an address space:  There are only two ways to allocate address space to processes: allocating separate space to each process or sharing the address space among the created processes

iii) Loading the program into the allocated address space: The executable program file is fully loaded into the allocated memory space.

iv) Passing the process description to the process scheduler:  Once, the three steps ofProcess formation as mention above are finished, the information gathered through the above-mentioned steps is sent to the process scheduler who allocate processor(s) resources to many competing to-be-executed processes queue.

The process execution phase is guarded by the process scheduler. Process scheduling may be per thread or per process. The process scheduling engage three concepts: state transition, process state, and scheduling policy.

A process may be in one of the following states:

(1)   Running: The process is being implemented on a multiple processors or Single processor.

(2)   New: The process is being formed.

(3)   Ready: The process is prepared to be executed if a processor is accessible.

(4)   Waiting: The process is coming up for some event to happen.

(5)   Terminated: The process has complete execution.

At the time, a process may be in some one of the above mentioned states. As soon as the process is declare into job queue, it goes into equipped state. When the process scheduler transmits the process, its state become running. If the process is completely executed then it is terminated and we say that it is in final state. However, the process may go back to complete state due to some interrupts or may go to ahead of you state due to some I/O activity. When I/O activity is ended it may go to ready state. The state transition diagram is shown in Figure 1:

                                        935_The Concept of Process.png

The scheduling policy may be also pre-emptive or non pre-emptive. In pre-emptive policy, the process can be interrupted. Operating systems have dissimilar scheduling policies. For example, to select a process to be implemented, one of the best scheduling policy may be: First In First Out (FIFO).When the process completed execution it is ended by system calls like abort, releasing all the allocated resources.


Related Discussions:- The concept of process-parallel computing

Fibre optics, #questifind core radius for single mode operation at 850nm in...

#questifind core radius for single mode operation at 850nm in SI fibre with n1=1.480 & n2=1.47 what is NAon..

Unencoded micro-instructions, Unencoded micro-instructions One bit ...

Unencoded micro-instructions One bit is required for each control signal; so number of bits needed in a micro-instruction is high. It represents a detailed hardware vi

Explain what is data mining, What is data mining? Data Mining: It...

What is data mining? Data Mining: It is an analytic process designed to explore data and after that to validate the findings through applying the detected patterns to lat

For what is defparam used, For what is defparam used? Though,  during  ...

For what is defparam used? Though,  during  compilation  of  Verilog  modules,  parameter  values  can  be  altered  separately  for every module instance. This allows us to pa

Explain three-way handshake mechanism, Explain Three-Way Handshake Mechanis...

Explain Three-Way Handshake Mechanism used by TCP to terminate a Session reliably. Just to guarantee that connection is sets up or terminated reliably, transfer control protoco

Show the foundation of ALU design, Q. Show the foundation of ALU design? ...

Q. Show the foundation of ALU design? The foundation of ALU design starts with micro-operation implementation. Thus let's first explain how bus can be used for Data transfer m

Explain i/o buffer and advantage of buffering, What is an I/O buffer? What ...

What is an I/O buffer? What is the advantage of buffering? Is buffering always effective? Justify your answer with help of an example.   One type of I/O requirement arises from

Reduce minimum literals and derive their complements, Q. Reduce following t...

Q. Reduce following to minimum literals and derive their complements. 1. [(AB)'A][(AB)'B] 2. ABC(ABC' + AB'C + A'BC) 3. (A+C+D) (A+C+D') (A+C'+D)(A+D')

C PROGAMM, CODING FOR...WHAT IS THE PROBABILITY THAT A CARD DRAWN FROM A PA...

CODING FOR...WHAT IS THE PROBABILITY THAT A CARD DRAWN FROM A PACK OF 52 CARDS WILL BE A DIAMOND OR A KING .

Flow-between matrix layout problem, Solve the problem in page 346 of the pa...

Solve the problem in page 346 of the paper on cell formation by Boctor using the MIP method.  Use 4 cells and no more than 3 machines per cell. Solve the problem using the MIP m

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd