System requirements for chip design, Computer Engineering

Assignment Help:

The Peripheral interface chip system requires the construction of the interface chip circuit, which is controlled by main micro-controller via the user interface. I also need set of various programs or instructions using C- language/ C - Compiler for the PIC micro and I2C codes to communicate between the main micro and the interface device through a simple bi-directional 2-wire, serial data (SDA) and serial clock (SCL) bus for inter-IC control. The key objectives are listed below.
Key Objectives:

• Interface chip circuit design
• User Interface i.e. (keypads and LCD display)
• Uploading codes to the Main Micro controller using ICD2
• Interface PIC microcontrollers via I2C bus.
• Writing functions or programs in C-language / C - Compiler for both Main Micro controller and Interface PIC microcontroller
• Writing low level routines or programs to handle communications between the peripherals
• I2C codes to communicate between the main micro and the interface device

TABLE: Specifications considered in the Project Designed:

Power Supply Voltage

2.0v to 5.5v

Current Sink/Source

25mA/25mA

Temperature

-40°C to 125°C

Watchdog timer

2.1uA

Clock Frequency (RTC)

32KHz -100KHz

PIC Micro-controller Family

PIC18F452

 User Interface  Device

LCD and 4x4 Matrix keypads

Serial Interface

I2C Protocol Bus

Software application

MPLAB MCC18- language Compiler


Related Discussions:- System requirements for chip design

Explain the action of an interrupt processing routine, Explain the action o...

Explain the action of an interrupt processing routine? Action of an interrupt processing routine is as follows : 1. Save contents of registers of CPU. This action is not e

What is binary search, Binary Search: Search a sorted array by repeatedly i...

Binary Search: Search a sorted array by repeatedly in-between the search interval in half. Start with an interval covering the entire array. If the value of the search key is less

Design combinational-sequential electronic logic gate, Combinational/Sequen...

Combinational/Sequential Logic design with Integrated Circuits (Dual in line package) Car wash concept with the following steps in a Combinational Logic Diagram: 1.    Start

Existential elimination, Existential Elimination : Now we have a sente...

Existential Elimination : Now we have a sentence, A, is with an  existentially quantified variable, v, so then just for every constant symbol k, that it does not appear anywhe

What is delayed branching, What is delayed branching? A method called d...

What is delayed branching? A method called delayed branching can minimize the penalty incurred as a result of conditional branch instructions. The idea is easy. The instruction

How many i/p & o/p a full adder logic circuit will have, A full adder logic...

A full adder logic circuit will have ? Ans. The full adder logic circuit also accounts the carry i/p generated in the earlier stage and it will add two bits. Hence three inputs

Show the steps of execution of instructions, Q. Show the steps of execution...

Q. Show the steps of execution of instructions? Fetch First Instruction into CPU: Step 1: Find/calculate the address of first instruction in memory. In this machine illust

Show the fundamental process of instruction execution, Q. Show the fundamen...

Q. Show the fundamental process of instruction execution? The fundamental process of instruction execution is:  1. Instruction is fetched from memory to CPU registers (calle

Explain the different types of buses with neat diagram, Explain the differe...

Explain the different types of buses with neat diagram. When a word of data is transferred among units, all the bits are transferred in parallel over a set of lines known as bu

What problem does the namespace feature solve, Multiple providers of librar...

Multiple providers of libraries may use common global identifiers causing a name collision when an application tries to link with two or more such libraries. The namespace feature

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd