Software architecture of microprocessor, Computer Engineering

Assignment Help:

The 68HC11 series is based on the Motorola 6800/1 programming instruction set and hence is a fairly simple 8 bit microprocessor. The internal structure of the 6800/1 is shown below

The 6800/1 contains two 8 bit accumulators namely A,B which are used to process/hold data for the Arithmetic/Logic calculations . These can be combined to form one single 16 bit accumulator namely D. Also included are two 16 bits index register IX, IY which are mainly used for  pointing too addresses , but can also be used as a 16 bit store or counter. The next two 16 bits registers are the Program counter (PC) used for holding the current address of the program and the stack pointer (SP) used for holding the address of the next available stack (RAM) position .The final register is a 8 bit register called the condition code register (CCR) , this is used to hold the results of the last ALU operation , each bit (flag) is a particular ALU condition  as shown below

2029_Software Architecture of microprocessor.png

C- Carry/Borrow flag if set indicates that an arithmetic carry/borrow has occurred

V overflow if set indicates that the answer was greater that 8 bits  

Z zero flag if set if the ALU answer has produced a zero  

N - Negative if set this indicates that a negative number has been generated i.e. bit 7 = 1  

I - Interrupt mask if set stops further masked interrupts from happening

H Half carry, if set indicates that a half carry has occurred i.e. ALU result has caused a carry to occur between bit 3,4

X - Interrupt mask, if set indicates that a non masked interrupt has occurred i.e. Reset or XIRQ. Cleared by TAP or RTI

S Stop disable if set disables the use of the stop instruction, if cleared enables the stop command

The 68HC11 instruction set consists of three major groups:
 
          Maths Functions 
          Movement functions
          Processor commands
 
Before we tackle each section we shall first discuss the various addressing modes of each instruction


Related Discussions:- Software architecture of microprocessor

Virtual memory and organization of a cache memory, Described virtual memory...

Described virtual memory Ans: Data is to be stored in physical memory locations that have addresses different from those that specified by the program. The memory control circu

Illustrate header section of a device driver, Q. Illustrate Header section ...

Q. Illustrate Header section of a device driver? Header comprises information which allows DOS to identify the driver. It also comprises pointers which allow it to chain to ot

What is computer virus, What is computer virus?  A  computer  virus  is...

What is computer virus?  A  computer  virus  is  a  computer  program  that  is  designed  to  spread  itself between   computers.   Computer virus are inactive when standing a

Factor causing parallel overheads, Performance metrics aren't able to attai...

Performance metrics aren't able to attain a linear curve in comparison to increase in number of processors in parallel computer. The main reason for above situation is presence of

Are there any special rules about inlining, Are there any special rules abo...

Are there any special rules about inlining? Yes, there are some rules about inlining - a.) Any source files which used inline function should contain function's definition.

How do stubs work in a weblogic server cluster, Clients that join to a WebL...

Clients that join to a WebLogic Server cluster and look up a clustered object get a replica-aware stub for the object. This stub haves the list of available server instances that h

What are the data types of vhdl, What are the Data types of VHDL VHDL....

What are the Data types of VHDL VHDL. A multitude of language or user defined data types can be used. This may mean dedicated conversion functions are needed to convert object

Explain relative addressing scheme, Q. Explain Relative Addressing Scheme? ...

Q. Explain Relative Addressing Scheme? In this addressing technique the register R is the program counter (PC) which contains the address of current instruction being executed.

Communications and synchronization, Communications Parallel tasks class...

Communications Parallel tasks classically need to exchange data. There are many ways in which this can be accomplished, such as, through a network or shared memory bus. The act

Fundamental differences between risc and cisc architecture, Q. Fundamental ...

Q. Fundamental differences between RISC and CISC architecture? Fundamental differences between RISC and CISC architecture. The following table lists following differences:

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd