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As mentioned above, page tables, are lookup tables mapping a process' virtual pages to physical pages in RAM. How would one implement these page tables?
The most straightforward approach would simply have a single linear array of page-table entries (PTEs). Each PTE contains information about the page, such as its physical page number ("frame" number) as well as status bits, such as whether or not the page is valid, and other bits to be discussed later.
If we have a 32-bit architecture with 4k pages, then we have 2 pages, as discussed in the last lecture. If each PTE is 4 bytes, then each page table requires 4 Mbytes of memory. And remember that each process needs its own page table, and theremay be on the order of 100 processes running on a typical personal computer. This would require on the order of 400 Mbytes of RAM just to hold the page tables on a typical desktop!
Furthermore, many programs have a very sparse virtual address space. The vast majority of their PTEs would simply be marked invalid.Clearly, we need a better solution than single-level page tables.
The hardware to support demand paging is as follows Page table: This table has the skill to mark an entry invalid though a valid-invalid bit or particular value of protectio
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