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Simple instruction formats:
RISC uses simple instruction formats. Usually only one or a few instruction formats are used. In these machines instruction length is fixed and aligned on word boundaries. Additionally the field locations can also be fixed. Such an instruction format has a number of advantages. With opcode decoding, fixed fields and register operand accessing can take place in parallel. This kind of design has many benefits. These are:
So RISC is possibly a very strong architecture. It has high performance potential and can support VLSI implementation.
It happens when two or more processes are reading or writing some joint data and the final result depends on who runs exactly when.
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