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RICS/CISC Architecture
An essential aspect of computer architecture is the design of the instruction set for the processor. The instruction set selected for a specific computer determine the way that machine language programs are constructed. Early computers had simple and small instruction sets, forced basically by the have to minimize the hardware used to implement them. With the advent of integrated circuits as digital hardware became cheaper and computer instructions tend to increase both in complexity and number. Many computers contain instruction sets that include more than hundred and sometimes even more than 200 instructions. These computers also employ a variety of data types and a large number of addressing modes. The trend for computer hardware complexity was influenced by several factors, such as upgrading existing models to provide more customer applications, adding instructions that facilitate the translation from high-level language into machine language programs and striving to develop machines that move functions from implementation of software into hardware . A computer with number of instructions is classified as a Complex Instruction Set Computer and abbreviated CISC.
In the early 1980s, a number of computer designers recommended that computers use fewer instructions with easy constructs so they may be executed much faster within the CPU without having to use memory as frequently. This type of computer is classified as a Reduced Instruction Set Computer or RISC.
RISC Characteristics : The concept of RISC architecture include an attempt to reduce execution time by make simple the instruction set of the computer. The main c
The Pentium The next member of the Intel family of microprocessors was the Pentium, introduced in the year 1993. With the Pentium, Intel broke its custom of numeric model name
Difference between div and idiv
NOT : Logical Invert: The NOT instruction complements (inverts) the contents of an a memory location or operand register bit by bit. The instance are as following: Example :
CMP: Compare: - This instruction compares the source operand, which can be a register or memory location an immediate data with a destination operand that might be a register or a
8088 Timing System Diagram The 8088 address/data bus is divided in 3 parts (a) the lower 8 address/data bits, (b) the middle 8 address bits, and (c) the upper 4 status/
to separate positive and negative numbers
DIV: Unsigned Division:- This instruction performs unsigned division operation. It divides an unsigned word or double word by a 16-bit or 8-bit operand. The dividend might be in t
1. Write a program that calculates the Fibonacci series: 1, 1, 2, 3, 5, 8, 13, ….. (Except for the first two numbers in the sequence, each number is the sum of the preceding two n
.MODEL SMALL .STACK 100H .DATA PROMPT DB \''The 256 ASCII Characters are : $\'' .CODE MAIN PROC MOV AX, @DATA ; initialize DS MOV DS, AX
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