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a) Give eight properties for each of static RAM (SRAM) and DRAM (dynamic RAM) and provide the low-level structure of each type of memory.
b) Assume a system with 16 Megabytes of main memory and a microprocessor that has an on-chip 256 kilobyte 8-way set-associative cache. Consider that each cache line has a size of 32 bytes.
(i) Show a block diagram of this cache showing its organization and how the different address fields are used to evaluate a cache hit/miss.
(ii) Where in the cache will the byte from memory location DECADE16 be mapped?
Q. Illustrate logical Data Processing Instructions? AND, OR, NOT, XOR operate on binary data stored in registers. For illustration if two registers comprises data: R1 = 10
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What is the LINQ file extension that interacts with Code Behinds objects? Ans) The extension of the file is .dbml
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