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a) Give eight properties for each of static RAM (SRAM) and DRAM (dynamic RAM) and provide the low-level structure of each type of memory.
b) Assume a system with 16 Megabytes of main memory and a microprocessor that has an on-chip 256 kilobyte 8-way set-associative cache. Consider that each cache line has a size of 32 bytes.
(i) Show a block diagram of this cache showing its organization and how the different address fields are used to evaluate a cache hit/miss.
(ii) Where in the cache will the byte from memory location DECADE16 be mapped?
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what is uml ?
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Define the component of a process precedence sequence? Ans. Process name, sequence operator and also concurrency operator components are process precedence sequence.
What are the elements of Analysis model? i. Data Dictionary ii. Entity Relationship Diagram iii. Data Flow Diagram iv. State Transition Diagram v. Control Specifica
Determine about the Locator Devices Mouse A mouse is small hand-held box used to position the screen cursor. Wheels or rollers on the bottom of the mouse can be used to r
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