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Micro-instructions are stored in control memory. Address register for control memory comprises the address of subsequent instruction which is to be read. Control memory Buffer Register receives micro-instruction which has been read. A particular micro-instruction execution mainlyincludes the generation of desired control signals and signals used to determine the subsequent micro-instruction to be executed. Sequencing logic section loads control memory address register. It issues a read command to control memory. The subsequent functions are performed by micro-programmed control unit:
1. Sequence logic unit specifies address of the control memory word which is to be read in the Address Register of Control Memory. It also issues READ signal.
2. Desired control memory word is read into control memory Buffer Register.
3. Content of the control memory buffer register is decoded to create control signals and subsequent-address information for sequencing logic unit.
4. Sequencing logic unit finds address of next control word on the foundation of next-address information from decoder and ALU flags.
The execute cycle steps of micro-operations are different for every instructions additionally the addressing mode can be different. All such information normally is dependent on opcode of the instruction Register (IR). So IR input to Address Register for Control Memory is desirable. So there exist a decoder from IR to Address Register for control memory.
How many select lines will a 32:1 multiplexer will have ? Ans. 5 select lines will be required for 32 inputs, as 2 5 = 32.
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what is the source code
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