Operation of micro controller, Computer Engineering

Assignment Help:

Consider the hardware design as shown. Within the target system the EPROM would contain the hex data as shown below

  Address  Assembly code
  8000             86
  8001             fe
  8002             8b
  8003             01
.  .........
  FFFE             80
  FFFF             00
 
On power on the microprocessor issues a reset which causes the processor to go into an interrupt mode, because the interrupt is a reset, the microprocessor reads the two top bytes from memory i.e fffe and ffff. These are called the initial program counter RESET vectors. In this case the processor would then load in the 16 bit address 8000 and load this directly into the program counter (PC). This causes the processor to jump to address 8000 and start the actual program. The processor then reads the next byte from address 8000; this is 86 Hex and translates it to a load A instruction with immediate data where the data follows in the next byte. The PC is incremented by 1 i.e 8001 and fe in read in . This takes two cycles and termed the 'Fetch cycle'. The next stage is the microprocessor to perform the instruction i.e. transfer the data fe into A, this is termed the 'Execution cycle'. The whole cycle starts again, i.e. the PC is incremented to 8002 and the command 8b (ADDA) is fetched and interpreted as a ADDA, the PC in incremented to 8003 and the data is read in i.e. 1. The command is then executed and the next instruction read in at 8004 and so on. A day in the life of the micro controller is one of fetching and executing. The initial data in the EPROM at address fffe, ffff is termed the reset vector and is an reserved area of memory for the programmers (us) to place vector address i.e. start address of programs to deal with exceptions i.e.  Clock Fail, IRQ, Timer output, Serial communications etc.

The full vector table is shown  .Although we have not actually used the stack, the emulator which we use to debug hardware/software programs uses a small part of it , therefore it is important that we initialise the stack , therefore the full program for adding two numbers is shown below

                   Name     add
                   P6811
                  org $8000    ; Start address of program   
  main:       Lds #$1ff     ; Set SP to top of internal Ram
                 Ldaa  #$fe   
                 adda  #$1   
 loop0:      jmp loop0       ; loop forever
                 org $fffe
                 FDB main    ;Reset vectors
                END
The bold sections are termed assembler directives and are used to control the assembler; the simplest ones are ORG which stands for origin, i.e. start code at this address  , the P6811 indicates 68HC11 processor and END which tells the assembler to stop. FDB informs the assembler to insert a double byte i.e. 16 bits of the address labelled main i.e. 8000.


Related Discussions:- Operation of micro controller

Direct addressing and immediate addressing mode , Direct Addressing and  I...

Direct Addressing and  Immediate Addressing mode - computer architecture:  Immediate Addressing: It is the simplest form of addressing. Here, the operand is itself given

Differences between flexgrid control and dbgrid control, Normal 0 ...

Normal 0 false false false EN-IN X-NONE X-NONE MicrosoftInternetExplorer4

What are parallel algorithms, What are Parallel Algorithms? The central...

What are Parallel Algorithms? The central assumption of the RAM model does not hold for some newer computers that can implement operations concurrently, i.e., in parallel algor

What is the use of cache memory, What is the use of cache memory? The u...

What is the use of cache memory? The use of the cache memories solves the memory access problem. In certain, when a cache is included on the same chip as the processor, access

Define dynamic linking, Define dynamic linking.  Dynamic linking is sam...

Define dynamic linking.  Dynamic linking is same to dynamic loading, rather that loading being postponed unless execution time, linking is postponed. This feature is usually us

Explain how viewstate is being formed, Explain how Viewstate is being forme...

Explain how Viewstate is being formed and how it is keeps on client. The type of ViewState is System.Web.UI.StateBag, which is a dictionary that keeps name/value pairs. View St

Find the complement of following functions, Q. Find the complement of follo...

Q. Find the complement of following functions and reduce to minimum literals 1. (A+C+D) (A+C+D') (A+C'+D)(A+D') 2. ABC(ABC' + AB'C + A'BC) 3. AB + AB' + A'C +A'C'

Components of information super highway infrastructure, Explain the compone...

Explain the components of Information Super Highway Infrastructure. The Information Superhighway is more than the Internet. It is a sequence of components, having the collectio

Types where relationship exists in electronic market place, What are the ty...

What are the types where relationship exists in Electronic Market Place? In this two forms of relationships can exist, they are: a. Customer/seller linkage is recognized at

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd