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Assume 64 different op codes and 19-bit instruction word in a computer system. Two bits in the instruction are reserved to indicate the addressing mode. a. Draw a box style sketch of a CPU showing and labeling Special Purpose Registers: PC, IR, MAR, and MDR and General Purpose Registers: Accumulator, R0-R3. b. How many different memory locations can this system access using direct and absolute addressing mode? c. How many different memory locations can this CPU access using base/offset addressing mode, if a 14-bit general purpose register serves as the base and can be loaded with any value?
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What is Code Optimization and Code Generation?
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