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Latches and flip-flop circuits:
Latches and Flip-flop circuits are a combination of logic gates that perform basic memory functions for computers and peripherals. Both these circuits retain their output signal even when the input signal has been removed; therefore, these circuits "remember" the input data. Figure shows a RS Latch circuit.
RS Latch
The two inputs to the latch are "SET" (S) and "RESET" (R), with two output signals Q and Q (not Q). A logic 1 at the S input will set the latch memory and Q equals 1, while Q will be 0. Logic 1 at the R input will reset the latch and Q will equal 0 and Q will equals 1.
Flip-flop circuits are similar to latch circuits; however, flip-flops change their output when a trigger pulse is applied. A flip-flop circuit contains three inputs, the S and R signals are identical with the latch circuit, the "Clock Pulse (CP) is an input that controls the circuit switch time. Its output will only change state at given time intervals controlled by the clock pulse.
The advantage of using a clock input for a memory circuit is that all flip-flop output signals change at the same time. This becomes very important when several memory circuits are used simultaneously.
Figure shows a Flip-flop circuit.
Outcomes of the FRA: When interpreting the outcomes of the FRA, NFPA 551 states that there are two ways in which the situation can be assessed to determine if it is acceptable
FLIP-FLOP
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