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Instruction Cycle
The instruction cycle consists of a series of steps needed for the implementation of an instruction in a program. A typical instruction in a program is described of two parts: Operand and Opcode. The Operand part identify the data on which the identified operation is to be done. The Operand part is separated into two parts: the Operand and addressing mode. The addressing mode specifies the method of determining the addresses of the real data on which the operation is to be executed and the operand part is used as an disputed by the method in determining the real address.
The control unit of the CPU of the computer fetches instructions in the program, only one at a time. The fetched Instruction is then decoded by the decoder which is a piece of the control unit and the processor implements the decoded instructions. The result of implementation is temporarily stored in Memory Buffer Register (MBR) (also called Memory Data Register). The ordinary execution steps are shown in Figure 2.
Zero address instruction format is used for (A) RISC architecture. (B) CISC architecture. (C) Von-Neuman architecture. (D) Stack-organized architecture.
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