Input-output techniques, Computer Engineering

Assignment Help:

After going through details of device interfaces next point to be discussed is how the interface can be used to support I/O from devices. Binary information received from an external device is generally stored in memory for later processing. Information transferred from central computer in an external device initiates in memory unit. Data transfer between central computer and I/O devices can be handled in some modes. 3 techniques are possible for I/O operation. These are:

  • Programmed input/output
  • Interrupt driven input/output
  • Direct memory access

Figure below gives an general idea of these 3 techniques:

1004_INPUT-OUTPUT TECHNIQUES.png

Figure: Overview of the three Input/ Output

In programmed I/O, I/O operations are fully controlled by processor. The processor executes a program which initiates, directs and terminate an I/O operation. It needs a little special I/O hardware however is quite time consuming for processor as processor has to wait for slower I/O operations to finish. 

With interrupt driven I/O when interface decides that device is ready for data transfer it produces an interrupt request to the computer. Upon detecting external interrupt signal processor stops the task it was processing and branches to a service program to process I/O transfer and then returns to task it was initially performing that result in waiting time by the processor being reduced.

With both interrupt-driven and programmed I/O processor is responsible for extracting data from main memory for output and storing data in main memory during input. What about having a substitute where I/O device may directly store data or retrieve data from memory? This alternative is called direct memory access (DMA). In this mode I/O interface and main memory exchange data directly without involvement of processor.

2405_INPUT-OUTPUT TECHNIQUES1.png

Figure: Three techniques of I/O


Related Discussions:- Input-output techniques

Array is a pointer to pointer to int, Array is a pointer-to-pointer-to-int:...

Array is a pointer-to-pointer-to-int: at the first level, it points to a block of pointers, one for each row. That first-level pointer is the first one we allocate; it has nrows e

Explain in detail about register transfer language, We have multiple instan...

We have multiple instances in RTL (Register Transfer Language), do you do anything special during synthesis stage? Whereas writing RTL(Register Transfer language),say in Verilo

Explain resource dependence, Resource Dependence The parallelism betwee...

Resource Dependence The parallelism between instructions can also be affected because of the shared resources. If two instructions are occupying the same shared resource then i

Differences between flexgrid control and dbgrid control, Normal 0 ...

Normal 0 false false false EN-IN X-NONE X-NONE MicrosoftInternetExplorer4

Translator for low level programming language, Translator for low level pro...

Translator for low level programming language were termed as? Ans. Translator for low level programming language is called as Assembler.

State the term- combinational circuit, In a pure combinational circuit is ...

In a pure combinational circuit is it necessary to mention all the inputs in sensitivity disk? if yes, why? Yes in a pure combinational circuit is it essential to mention all

Illustrate about the word processors with its design, Illustrate about the ...

Illustrate about the Word processors with its design Word processors now have many aspects over and above the original task of generating a typed document. This section would

What is digital versatile disk, Digital versatile disk (DVD) This is an...

Digital versatile disk (DVD) This is an optical system for storing data. It's similar to CD though typically can hold 4.7 Gbyte of data compared to only 700 MB of data on a CD.

Explain about RISC pipelining, Q. Explain about RISC PIPELINING? Instru...

Q. Explain about RISC PIPELINING? Instruction pipelining is frequently used to increase performance. Let's consider this in context of RISC architecture. In case of RISC machin

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd