Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
After going through details of device interfaces next point to be discussed is how the interface can be used to support I/O from devices. Binary information received from an external device is generally stored in memory for later processing. Information transferred from central computer in an external device initiates in memory unit. Data transfer between central computer and I/O devices can be handled in some modes. 3 techniques are possible for I/O operation. These are:
Figure below gives an general idea of these 3 techniques:
Figure: Overview of the three Input/ Output
In programmed I/O, I/O operations are fully controlled by processor. The processor executes a program which initiates, directs and terminate an I/O operation. It needs a little special I/O hardware however is quite time consuming for processor as processor has to wait for slower I/O operations to finish.
With interrupt driven I/O when interface decides that device is ready for data transfer it produces an interrupt request to the computer. Upon detecting external interrupt signal processor stops the task it was processing and branches to a service program to process I/O transfer and then returns to task it was initially performing that result in waiting time by the processor being reduced.
With both interrupt-driven and programmed I/O processor is responsible for extracting data from main memory for output and storing data in main memory during input. What about having a substitute where I/O device may directly store data or retrieve data from memory? This alternative is called direct memory access (DMA). In this mode I/O interface and main memory exchange data directly without involvement of processor.
Figure: Three techniques of I/O
function nor gates W=A,B,C,D=~(AB)*~(CD)
Target abort -computer architecture: Usually, a target holds DEVSEL# asserted through the final data phase. However, if a target desserts DEVSEL# before disconnecting without
Q. Illustrate program on hypothetical machine? The program given in figure above is a hypothetical program which performs addition of numbers stored from locations 2001 onwards
what is homogeneous coordinate system
Differentiate between Prepurchase and Purchase Consummation of consumer mercantile model. The prepurchase interaction for consumers comprises three activities: Product/ser
representation of the adjacency matrix and adjacency list
Explain Priority encoder with an example. Ans. Priority encoder- Basically an encoder is a combinational circuit which performs the inverse operation of a decoder. The inp
Parallelism Conditions As discussed earlier, parallel computing needs the segments to be executed in parallel should be independent of each other. So before executing paralleli
What is imprecise and precise exception? Situation in which one or more of the succeeding instructions have been implemented to completion is known as imprecise exception. Situ
Drawbacks of linear arrays
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd