Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. Implementation of a Simple Arithmetic?
So, by now we have concerned how logic and arithmetic micro-operations can be applied individually. If we combine these 2 circuits along with shifting logic then we may have a possible simple structure of ALU. Basically ALU is a combinational circuit whose inputs are contents of specific registers. ALU performs desired micro-operation as decided by control signals on input and places results in an output or destination register. Whole operation of ALU can be performed in a single clock pulse as it's a combinational circuit. Shift operation can be performed in a separate unit however sometimes it can be made as a part of overall ALU. The following diagram gives a simple structure of one stage of an ALU.
One stage of ALU with shift capability
Please note that in this diagram we have given reference to two previous figures for arithmetic and logic circuits. This phase of ALU has two data inputs; the ith bits of registers to be manipulated. But the (i - 1)th or (i+1)th bit is also fed for case of shift micro-operation of only one register. There are 4 selection lines that determine what micro-operation (arithmetic, logic or shift) on the input. The Fi is resultant bit after desired micro-operation. Let's see how value of Fi changes on the foundation of four select inputs. This is displayed in Figure below:
Please note that in Figure below arithmetic micro-operations have both S3 and S2 bits as zero. Input Ci is significant for only arithmetic micro-operations. For logic micro-operations S3, S2 values are 01. Values 10 and 11 cause shift micro-operations.
For this shift micro-operation S1 and S0 values and Ci values don't play any role.
Figure: Micro-operations performed by a Sample ALU
Explain the necessary conditions for deadlock to occur. Conditions for deadlock to arise are: i. Mutual exclusion: At least one resource must be held in a non-sharable mo
Q. Sequential Execution of Instructions in RISC? Let's describe pipelining in RISC with an illustration program execution sample. Take the given program (R denotes register).
Define the Operating Characteristics for master-slave S-R flip-flop? 1. Propagation Delay Time - is the interval of time required subsequent to an input signal has been applied
What is random access memory(RAM or MAIN MEMORY) and mention its types? The main memory in the central storage unit in a computer system. It is relatively large and fast memory
mmmmmmmmmmmmm mmmmmmm s s s s s s s s s d d d d d d d d d d d d d d f f ff g gg g g g g gg r r r rr r w ww w w ww w w
Q. Explain working of D Flip -Flop? D (data) flip-flop is modification of RS flip-flop. Problem of undefined output in SR flip-flop when both R and S become 1 gets avoided in D
Q. What is Gantt chart and Kiviat diagram? Gantt chart: Gantt chart explains numerous activities of every processor with respect to progress in time in busy -overhead - id
Q. Interfacing of keyboards? The keyboard employs a special Input/output port which is similar to a serial port however doesn't explicitly follow the RS-232 serial port standar
What is Strobe. Asynchronous data are transfer among two independent unit needs that control signals to be transmitted among the communicating units to indicate the time at whi
Q. Prove using Boolean Algebra 1. AB + AC + BC' = AC + BC' 2. (A+B+C) (A+B'+C') (A+B+C') (A+B'+C)=A 3. (A+B) (A'+B'+C) + AB = A+B 4. A'C + A'B + AB'C + BC = C + A'B
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd