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Q. Illustrate working of Asynchronous Counters?
This is more frequently referred as ripple counter as the change that takes place in order to increment counter ripples through it from one end to other. Figure below shows an implementation of 4-bit ripple counter using J-K flip-flops. This counter is incremented on occurrence of every clock pulse and counts from 0000 to 1111 (it means 0 to 15).
Figure: 4 - bit ripple counter
Input line to J & K of all flip-flops is kept high it implies that logic1. Every time a clock pulse takes place value of flip-flop is complemented Please consider that clock pulse is given only to first flip-flop and second flip-flop onwards and output of previous flip-flop is fed as clock signal. This means that flip-flops will be complemented if previous flip-flop has a value 1. So effect of complement will ripple through these flip-flops.
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K map explanation for mod 5 up synchronous counter ?
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