Q. Illustrate Simple ALU Organisation?

An ALU comprises circuits which perform data processing micro-operations. Though how are these ALU circuits used in conjunction of other registers and CU? The simplest organisation in this respect for fixed point ALU was proposed by John von Neumann in his IAS computer design.

Figure: Structure of a Fixed point Arithmetic logic unit

The above structure has 3 registers AC, MQ and DR for data storage. Let's presume that they are equal to one word each. Please consider that Parallel adders and other logic circuits (these are the arithmetic, logic circuits) have two inputs and just one output in this figure. It suggests that any ALU operation at most can have two input values and will produce single output along with other status bits. In the current case the two inputs are AC and DR registers whereas output is AC register. AC and MQ registers are usually used as a single AC.MQ register. This register is capable of right or left shift operations. A number of the micro-operations which can be defined on this ALU are:

Addition            :  AC ← AC + DR

Subtraction        :  AC ← AC - DR 

AND                 :  AC ← AC ^ DR

OR                  :  AC ← AC   DR

Exclusive OR    :  AC ← AC (+) DR

NOT                 :  AC ← AC

In this ALU organisation division and multiplication were implemented employing shift-add/subtract operations. MQ (Multiplier-Quotient register) is a special register used for implementation of division andmultiplication. We aren't providing details of how this register can be used for implementing division and multiplication algorithms. For more details on these algorithms please refer to further readings. An example of this type of algorithm is Booth's algorithm and you should refer to it in further readings.  

For division or multiplication operations DR register stores the divisor or multiplicand respectively. The result of division or multiplication on applying certain algorithm can finally be attained in AC.MQ register combination. These operations can be signified as:

Multiplication   :  AC.MQ ← DR × MQ

Division           :  AC.MQ ← MQ ÷ DR

DR is another significant register which is used for storing second operand. Actually it acts as a buffer register that stores the data brought from memory for an instruction. In machines where we have general purpose registers any of the registers can be utilized like AC, MQ and DR.