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Q. Illustrate control and timing signals?
The requirement of I/O from different I/O devices by processor is quite unpredictable. In fact it relies on I/O needs of particular programs and generally doesn't follow any pattern. Because the I/O interfaces also shares memory and system bus for data input/output, control and timing are required to coordinate the flow of data to/from external devices from/to processor or memory. For illustration control of the transfer of data from a peripheral device to processor might include subsequent steps:
1. The processor enquires from I/O interface to check status of attached device. Status can be busy, ready or out of order.
2. I/O interface returns device status.
3. If device is operational and ready to transmit then processor requests transfer of data by a command that is a binary signal to I/O interface.
4. I/O interface attains a unit of data (for example 8 or 16 bits) from external device.
5. Data is transferred from I/O interface to processor.
The Task Gantt shows the various tasks being performed i.e., some type of activities by the set of processors attached to the parallel computer as shown in Figure . Task Gantt
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