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Q. Illustarte Basic Flip-flops?
Let's first see a ordinary latch. A latch or flip-flop can be created employing two NOR or NAND gates. Figure (a) presents logic diagram for S-R latch using NOR gates. Latch has two inputs S and R for set and reset respectively. When output is Q=1 and Q¯ =0, latch is said to be in set state. Whereas if Q=0 and Q¯ =1 it's in reset state. Usually outputs Q and Q¯ are complement of one another. When both inputs are equivalent to 1 at same time an undefined state results as both outputs are equivalent to 0.
What techniques are used to increase the clock rate R? Ans: The 2 techniques used to increase the clock rate R are: 1. We can reduce the amount of processing done in one basi
Briefly explain the floating point representation with an example? The floating point representation has 3 fields 1.sign bit 2.siginificant bits 3.exponent For exa
Q. Define Message Passing? The PVM communication model offers asynchronous blocking receive and asynchronous blocking send and nonblocking receive functions. In our terminology
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Network throughput It is an indicative measure of the point carrying capacity of a network. It is distinct as the total number of messages the network can transmit per unit tim
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Explain in detail about the Dynamic timing a. Design is simulated in full timing mode. b. Not all possibilities tested, as it is dependent on input test vectors. c. Simul
Q. Convert the following from hexadecimal to binary, decimal, BCD and octal. a) 111 b) ABC.25 c) 2.C Q. Convert the following from BCD to binary, decimal, hexadecimal an
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