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Q. Illustarte Basic Flip-flops?
Let's first see a ordinary latch. A latch or flip-flop can be created employing two NOR or NAND gates. Figure (a) presents logic diagram for S-R latch using NOR gates. Latch has two inputs S and R for set and reset respectively. When output is Q=1 and Q¯ =0, latch is said to be in set state. Whereas if Q=0 and Q¯ =1 it's in reset state. Usually outputs Q and Q¯ are complement of one another. When both inputs are equivalent to 1 at same time an undefined state results as both outputs are equivalent to 0.
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Q.Prove using Boolean Algebra 1. X (X+Y) = X 2. AB + AC + BC' = AC + BC' 3. (A+B+C) (A+B'+C') (A+B+C') (A+B'+C)=A 4. (A+B'+C) (AB+A'C) = (A+C) (A'+B) 5. XY + XZ + YZ
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