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1. A computer system has a two-level memory cache hierarchy. The L1 cache has a zero hit penalty, a miss penalty of 5 ns and a hit rate of 95 percent. The L2 cache has a miss penalty of 100 ns and a hit rate of 90 percent.
a) How many cycles are lost for each instruction accessing the memory if the CPU clock rate is 2 GHz?
b) We can either increase the hit rate of the topmost cache to 98 percent or increase the hit rate of the second cache to 95 percent. Which improvement would have more impact?
Q. Basic working of Spanning Tree? Spanning Tree - Redundant bridges may be installed to provide reliability - To prevent infinite looping of packets between bridges,
What is the method of BGP speakers and Peers?
a) Used for sending e-mail. b) Uses port 25.
Retransmission of packets The disadvantage of thronging away a correctly received packet is that the subsequent retransmission of the packet might be lost or garbled and
advantage og stored program control automation
Q. Show Example on Check Sum? Data: 10101001 00111001 Computing Checksum: 10101001 00111001 --------------- Sum 11100010 Receiver Side: 10101
Describe the term - stateful implies The term stateful implies that the firewall is wakeful and is capable of remembering the state of each session of packet exchange across it
Normal 0 false false false EN-IN X-NONE X-NONE Application Layer The application layer
what is variable ip address
Hypercube Network The hypercube architecture has played a vital role in the development of parallel processing and is still not much popular and influential. The highly symmetr
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