How many cycles are lost for instruction accessing memory, Computer Networking

Assignment Help:

1.  A computer system has a two-level memory cache hierarchy. The L1 cache has a zero hit penalty, a miss penalty of 5 ns and a hit rate of 95 percent. The L2 cache has a miss penalty of 100 ns and a hit rate of 90 percent.

a)  How many cycles are lost for each instruction accessing the memory if the CPU clock rate is 2 GHz?

b)  We can either increase the hit rate of the topmost cache to 98 percent or increase the hit rate of the second cache to 95 percent.  Which improvement would have more impact?


Related Discussions:- How many cycles are lost for instruction accessing memory

Determine the rate of communication line, Determine the rate of communicati...

Determine the rate of communication line The dog could carry 21 gigabytes or 168 gigabits. A speed of 18 km/hour that is equal to 0.005 km/sec. The time to travel the distance

What is groupware, What is Groupware Groupware are a collection of sof...

What is Groupware Groupware are a collection of software tools that encompass a broad range of applications. Even though groupware broadly consists of applications like calend

Explain the working of ISDN, Explain the working of ISDN Stands for ...

Explain the working of ISDN Stands for Integrated Services Digital Network. It is a way to move more data over existing regular phone lines. ISDN is rapidly becoming availab

Types of vts sonet sdh, Types of VTs There are  several  option for  pa...

Types of VTs There are  several  option for  payload are actually mapped into the VT.  Locked mode VTs  bypass the pointers with a fixed  byte oriented mapping of limited flexi

Cpm-pert network analysis problem, Solve the following CPM/PERT Network Ana...

Solve the following CPM/PERT Network Analysis problem: Given the following network and activity time estimates, determine earliest and latest activity times, slack, the expecte

Udp connection establishment & termination, simple introduction,defination ...

simple introduction,defination and with example & digram

What is the advantage of address sharing, What is the advantage of address ...

What is the advantage of address sharing? By using address translation instead of routing, address sharing gives an inherent security benefit. That's because host PCs on the In

Switching creates variable latency through the switch, DEFINITION: Latency ...

DEFINITION: Latency = Delay. Because a store and forward switch reads the entire frame before forwarding, a larger frame takes longer than a shorter frame.

Which two commands shows the cisco ios filename, These two command show the...

These two command show the cisco IOS filename a) show ver b) show flash

Osi reference model - fundamentals of networks, OSI Reference  Model ...

OSI Reference  Model Normal 0 false false false EN-IN X-NONE X-NONE

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd