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How blocking and non blocking statements get executed?
Execution of blocking assignments can be viewed just like a one-step process:
1. Evaluate RHS (right-hand side equation) and update LHS (left-hand side expression) of the blocking assignment without interruption from any other Verilog statement. A blocking assignment "blocks" trailing assignments in the same always block from occurring until after current assignment has been completed
Execution of nonblocking assignments can be viewed as a two-step process:
1. Evaluate RHS of nonblocking statements at the beginning of the time step.
2. Update LHS of nonblocking statements at the end of the time step.
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