Fetching a word from memory:

CPU transfers the address of the needed information word to the memory address register (MAR). Address of the needed word is transferred to the primary memory.

• In the meantime, the CPU uses the control lines of the memory bus to mention that a read operation is needed.
• After issuing this request, the CPU waits till it retains an answer from the memory, informing it that the required function has been finished. It is accomplished through the use of another control signal on the memory bus, which will be denoted as Memory Function Completed (MFC).
• The memory sets this signal to one to mention that the contents of the particular location in the memory have been read and are available on the data lines of the memory bus.
• We will suppose that as soon as the MFC signal is set to one, the information on the data lines is loaded into

MDR and is therefore available for use inside the CPU. It finishes the memory fetch operation.

The actions required for instruction Move (R1), R2 are:

MAR - [R1]

• Begin Read operation on the memory bus
• Wait for the response of the MFC from the memory
• Load MDR from the memory bus
• R2 - [MDR]

Signals activated for that problem are:

• WMFC MDRout
• R1out, MARin,
• Read MDRinE, , R2in