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Question:
(a) Comment on the general structure of the IAS Computer, illustrate your answer using a diagram.
(b) (i) Define CPU time.
(a) (ii) A program runs in 10 seconds on a computer A, which has a 100 MHZ clock. A designer has to build a machine B that will run the same program in 6 seconds. The designer has determined that a substantial increase in clock rate is possible, but this will affect the rest of the CPU design, causing machine B to require 1.2 times as many clock cycles as machine A for this program. What clock rate should the designer target?
(c) Explain what is meant by a "bus". Name the two types of buses and give a brief description of both.
(d) Explain with the help of a diagram how to accommodate interrupts in an instruction cycle.
1. (e) In respect of computer disks, explain the terms: (i) Sector, (ii) Track, (iii) Cylinder.
Discuss about variables and assignmesnt statements
flow chart
The maximum number of dimensions an array can have in C is C permits arrays of three or more dimensions. The exact limit is examined by the compiler.
When the set of input data to an even parity generator is 0111, the output will be ? Ans. Into even parity generator if number of one is odd then output will be 0.
What is spatial parallelism
What are the gates required to build a half adder ? Ans. The gates needed to build a half adder are EX-OR gate and AND gate as shown below the logic diagram of half adder:
Explain the Structure of Virtual Enterprise. The effective enterprise can be a suitable structure to explore the emerging opportunities for creating value within the informatio
Ask qurecurrion for short noteestion
Translation Look aside Buffer : A TLB is a cache that holds only page table mapping If there is no matching entry in the TLB for a page ,the page table have to
MIPS - computer architecture: The MIPS ISA, so far 3 instruction formats Fixed 32-bit instruction 3-operand, load-store architecture 32 general-purpose register
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