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Question:
(a) Comment on the general structure of the IAS Computer, illustrate your answer using a diagram.
(b) (i) Define CPU time.
(a) (ii) A program runs in 10 seconds on a computer A, which has a 100 MHZ clock. A designer has to build a machine B that will run the same program in 6 seconds. The designer has determined that a substantial increase in clock rate is possible, but this will affect the rest of the CPU design, causing machine B to require 1.2 times as many clock cycles as machine A for this program. What clock rate should the designer target?
(c) Explain what is meant by a "bus". Name the two types of buses and give a brief description of both.
(d) Explain with the help of a diagram how to accommodate interrupts in an instruction cycle.
1. (e) In respect of computer disks, explain the terms: (i) Sector, (ii) Track, (iii) Cylinder.
Explain SR Latch with NAND Gate? SR Latch has two useful states: Set state, when output Q=1 and Q'=0. Reset state, when output Q=0 and Q'=1.Output Qand Q' are normally
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An off-hook signal will repeat for a/an duration. For a/an finite duration, an off-hook signal will repeat.
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Ans) BEA Web Logic is a J2EE application server and also an HTTP web server by BEA Systems of San Jose, California, for UNIX, Linux, Microsoft Windows, and other platforms. Web Log
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