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Explain MDR and MAR.
The data and address lines of the external memory bus linked to the internal processor bus by the memory data register, MDR and the memory address register, MAR, respectively. Register MDR has two inputs and two outputs. Data might be loaded into MDR either from the memory bus or from the internal processor bus the data kept in MDR may be placed on either bus. The input of MAR is linked to the internal bus and its output is linked to the external bus.
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Output comparators are used in Theses are used in Dynamic testing of single and multiple module.
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