Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. Explain about RISC ARCHITECTURE?
Let's first list some significant considerations of RISC architecture:
1. RISC functions are kept simple unless there is a very good reason to do otherwise. A new operation which increases execution time of an instruction by 10 per cent can be added only if it decreases size of the code by at least 10 per cent. Even greater reductions might be necessary if the extra modification requires a change in design.
2. Micro-instructions stored in CU cannot be faster than simple instructions because the cache is built from same technology as writable control unit store, a simple instruction can be executed at same speed as that of a micro-instruction.
3. Microcode is not magic. Moving software into microcode doesn't make it better; it only makes it harder to change. Runtime library of RISC has all characteristics of functions in microcode, except that it's easier to change.
4. Simple decoding and pipelined execution are more significant than program size. Pipelined execution gives a peak performance of one instruction each step. The longest step determines the performance rate of pipelined machine so ideally every pipeline step must take same amount of time.
5. Compiler must simplify instructions instead of generate complex instructions. RISC compilers try to eliminate as much work as possible at the time of compile time so that simple instructions can be used. For illustration RISC compilers attempt to keep operands in registers so that simple register-to-register instructions can be used. RISC compilers keep operands which will be reused in registers instead of repeating a memory access or a calculation. They consequently use LOADs and STOREs to access memory so that operands aren't implicitly discarded after being fetched.
An experts system has knowledge that lets it reason about its own operations plus a structure that simplifies this reasoning process. For example if an expert system
Elements of Parallel Computing and Architecture Parallel computing. Then we shall describe why we need parallel computing and what the heights of parallel processing are. We s
Flynn's Categorization Flynn's Categorization is based on multiplicity of data streams and instruction streams observed by CPU at the time of program execution. Let I s and D
Explain the difference between depth first and breadth first traversing techniques of a graph. Depth-first search is dissimilar from Breadth-first search in the following way
A sorting algorithm is stable if Preserves the original order of records with equivalent keys.
Consider the data with categorical predictor x 1 = { green or red } and numerical predictor x 2 and the class variable y shown in the following table. The weights for a round
Q. Illustrate Single In-line Memory Modules? From early days of semiconductor memory till the early 1990s memory was manufactured, brought and installed as a single chip. Chip
Period and Space Tradeoffs - artificial intelligence: In practice, you are going to stop your agent for long term using in searching goal at some stage if it has not found a s
What are two methods of modifying SAP standard tables? Append Structures and Customizing Includes.
The addressing specially used by Transport Layer is? The addressing particularly used through transport layer is application port address.
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd