Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. Explain about Programmable Logic Array?
Until now individual gates are considered as fundamental building blocks from that different logic functions can be derived. With the advancement of technology integration achieved by integrated circuit technology has raised resulting in production of one to 10 gates on a single chip (in small scale integration). The gate level designs are created at gate level only however if design is to be done employing these SSI chips design consideration required to be changed as some of such SSI chips may be used for creating a logic circuit. With VLSI and MSI we can put still more gates on a chip and can make gate interconnections on a chip also. This connection and integration brings benefits of reduced cost and size as well as increased speed. However main drawback faced in these kinds of VLSI & MSI chip is that for every logic function layout of gate and interconnection requires to be designed. Cost involved in making these custom designs is quite high. So came the concept of Programmable Logic Array which is a general purpose chip that can be readily accepted for any particular purpose.
PLA are designed for SOP form of Boolean function and comprises regular arrangements of AND, NOT and OR gate on chip. Every input to chip is passed through a NOT gate so input and its complement are available to every AND gate. Output of every AND gate is made available for every OR gate and output of every OR gate is considered as chip output. By making suitable connections any logic function can be realized in these Programmable Logic Arrays.
Figure: Programmable Logic Array
The figure (a) presents a PLA of 3 inputs and 2 outputs. Please consider connectivity points, all these points can be linked if desired. Figure (b) presents an implementation of logic function:
O0 = I0. I1. I2 + I¯0. I¯1. I¯2 and O1 = I¯0. I¯1. I¯2 + I¯0. I¯1 through PLA.
What is race around condition? Ans: Race Around Condition:- Jn Kn Q(n+1) output 0 1 0 1 0 0
Any function can be expressed in a truth table.A truth table lists all possible combinations ofinputs and gives the output produced in eachcase.Truth tables must include all combin
How a pointer variable declared in C ? Why is it sometimes desirable to pass a pointer to a function as an argument? A pointer is a variable which contains the address in memor
The implementation of a (non-recursive) binary search of an array. The assumption is that a given array is sorted. We want to see if a particular value, that we'll call the target
Question: a) With the help of a diagram, describe clusters in cellular systems. b) Describe the role of the following components in the GSM architecture Radio Sub-Sy
Name the switching schemes used in a digital exchange? The several switching systems used are: 1. Strowger Switching System 2. Cross bar Switching. 3. Electronic Swit
Extranets can be also used to connect an intranet to Internet so that remote offsite access can be made in a company's intranet by an authorized individual. This can facilitate thr
Main script section ("Sub Main .. End Sub) and function bodies should fit within an A4-page (approx. two monitor-pages). If the code doesn't fit it is a candidate to do more decoup
example of branching take place in instructon pipeline
Illustrate about object oriented development object oriented development is not direct way of system development as in this approach a holistic view of application domain is co
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd