Explain about interrupt-processing sequence, Computer Engineering

Assignment Help:

Q. Explain about Interrupt-Processing Sequence?

The occurrence of an interrupt fires a numbers of events both in processor hardware and software. Figure below displays a sequence.

1305_Explain about Interrupt-Processing Sequence.png

Figure: Interrupt-Processing Sequence

When an I/O device completes an I/O operation, the below sequence of hardware events takes place: 

1. The device issues an interrupt signal to processor.

2. Processor completes execution of current instruction before responding to interrupt.

3. Processor tests for interrupts and sends an acknowledgement signal to device that issued the interrupt.

4. The minimum information needed to be stored for task being currently executed before CPU starts executing interrupt routine (using its registers) are: 

(a) Status of processor that is contained in register known as program status word (PSW), and

(b) Location of next instruction to be executed, of currently executing program that is contained in program counter (PC).

5. Processor now loads PC with entry location of interrupt-handling program which will respond to this interrupting condition. Once PC has been loaded, processor proceeds to execute next instruction, which is the next instruction cycle that begins with an instruction fetch. Since the instruction fetch is determined by contents of the PC, result is that control is transferred to interrupt-handler program. The execution results in the subsequent operations:

6. PC & PSW relating to interrupted program have already been saved on system stack. Additionally the contents of processor registers are also needed to be saved on stack which are used by called Interrupt Servicing Routine since these registers may be modified by interrupt-handler. Figure (a) displays a simple illustration. Here a user program is interrupted after instruction at location N. Contents of all of registers and address of next instruction (N+1) are pushed on to stack.

7. Interrupt handler next processes interrupt. This involves determining of event which caused the interrupt and also status information relating to I/O operation.

8. When interrupt processing is finish, saved register values are retrieved from stack and restored to registers that are displayed in Figure (b).

9. Final step is to restore values of PSW and PC from stack. Consequently the instruction to be executed will be from previously interrupted program.


Related Discussions:- Explain about interrupt-processing sequence

C LANGUAGE PROGRAMME, find a c program to find the area under the curve y=f...

find a c program to find the area under the curve y=f(x) between x=a and x=b,intregrate y=f(x)between the limits of a and b.the area under a curve between two points can be found b

Human–computer interaction, In the view of the M364 module team, HCI has be...

In the view of the M364 module team, HCI has been superseded by ID. This is because HCI traditionally concentrated upon desktop computers with single users, whereas ID includes the

Modelsim, design a basic computer

design a basic computer

stores on each line a part number, Make a file "parts_inv.dat" that stores...

Make a file "parts_inv.dat" that stores on each line a part number, cost, and quantity in inventory, e.g.: 123 5.99 52 456 3.97 100 333 2.22 567 Use fscanf to read this infor

Explain macro definition, Explain macro definition. A unit of specifica...

Explain macro definition. A unit of specification for a program generation is termed as a macro. This consists of name, body of code and set of formal parameters.

Loop level-parallelism based on granularity size, Loop Level This is...

Loop Level This is one more level of parallelism where iterative loop instructions can be parallelized. Fine Granularity  size is used at this level also. Simple loops in a

C++, At a shop of marbles, packs of marbles are prepared. Packets are named...

At a shop of marbles, packs of marbles are prepared. Packets are named A, B, C, D, E …….. All packets are kept in a VERTICAL SHELF in random order. Any numbers of packets with thes

Difference between leave transaction and call transaction, What is the diff...

What is the difference between Leave Transaction and Call Transaction? In contrast to LEAVE TO TRANSACTION, the CALL TRANSACTION  statement causes the system to start a new SAP

Show the Features of parallel virtual machine, Q. Show the Features of para...

Q. Show the Features of parallel virtual machine? Easy to install; Easy to configure; Multiple users each can use PVM concurrently; Multiple applications fro

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd