Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. Explain about Hamming error correcting code?
Richard Hamming at Bell Laboratories worked out this code. We will only introduce this code with help of an illustration for 4 bit data. Let's presume a 4 bit number b4, b3, b2, b1. In order to create a simple error detection code which detects error in one bit only we can just add an odd parity bit. Though if we want to find which bit is in error then we may have to employ parity bits for different combinations of these 4 bits in such a way that a bit error can be recognized uniquely. For illustration we can create four parity sets as below
Source Parity Destination Parity
b1, b2, b3 P1 D1
b2, b3, b4 P2 D2
b3, b4, b1 P3 D3
b1, b2, b3, b4 P4 D4
Now very interesting phenomenon can be noticed in above displayed parity pairs. Assume data bit b1 is in error on transmission then it will cause alteration in destination parity D1, D3, D4.
ERROR IN Cause change in Destination Parity
(One bit only)
b1 D1, D3, D4
b2 D1, D2, D4
b3 D1, D2, D3, D4
b4 D2, D3, D4
Figure: The error detection parity code mismatch
So by simply comparing parity bits of source and destination we can recognize that which of four bits is in error. This bit then can be complemented to eliminate error. Please note that even source parity bit can be in error on transmission but under assumption that just one bit (irrespective of data or parity) is in error it would be detected as just one destination parity would be different. What should be length of error detection code that detects error in one bit? Before responding this question we have to look in comparison logic of error detection. Error detection is done by comparing two ‘i’ bit error detection and correction codes fed to comparison logic bit by bit (see figure below). Let’s have comparison logic that produces a zero if compared bits are same or else it generates a one. Consequently if similar Position bits are similar then we obtained zero at that bit Position however if they are dissimilar that is this bit position may point to an error then this Particular bit position would be marked as one. This way a matching word is built. This matching word is ‘i’ bit long so can signify 2i values or combinations.
Explain Tri-state logic inverter with the help of a circuit diagram. Give its Truth Table. Ans: Tri-state Logic Inverter: The functional diagram of Tri-state Logic Inve
What is pipelining? The overlapping of implementation of successive instructions is known as pipelining.
Build data Flow diagrams showing functional dependencies Data flow diagrams are very useful for showing functional dependencies. In data flow diagrams processes are indicated
Even while Generalization satisfies Structural, Interface, Behaviour properties. It is mathematically very strong, as it is Antisymmetric and Transitive. Antisymmetric: employe
What is low-level formatting? Before a disk can store data, it must be divided into sectors that the disk controller can read and write. This process is known as low-level for
Q. Explain Relative Addressing Scheme? In this addressing technique the register R is the program counter (PC) which contains the address of current instruction being executed.
Of the two "next screen "attributes the attributes that has more priority is?? Dynamic.
What is a recursively enumerable language? The languages that is accepted by TM is said to be recursively enumerable (r. e) languages. Enumerable means that the stri
A call processor in an exchange requires 120 ms to service a complete call. What is the BHCA rating for the processor? If the exchange is capable of carrying 700 Erlangs of traffic
The Linux Process Scheduler uses time slice to prevent a single process from using the CPU for too long. A time slice specifies how long the process can use the CPU. In our simulat
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd