Explain about bus of register transfer, Computer Engineering

Assignment Help:

Explain about Bus of register transfer

Since a computer has   several registers, paths must be provided to transfer information among registors. If separate lines are used among each register and all other registers, number of wires will be extreme in the system. A more resourceful scheme for transferring information among registers in a multiple-register configuration is common bus system. A bus structure consists of a group of common lines, one for each bit of a register, by which binary information is transferred one at a time. Control signals decide which register is selected by bus during each particular register transfer.

 


Related Discussions:- Explain about bus of register transfer

Evaluate physical address of top of stack, Q. Evaluate Physical address of ...

Q. Evaluate Physical address of top of stack? Value of stack segment register (SS) = 6000h Value of stack pointer (SP) which is Offset = 0010h  So Physical address of top

Problems.., what are the different types of tablets?

what are the different types of tablets?

Various connectivity option available to internet subscriber, What are the ...

What are the various connectivity options available to Internet Subscribers? Internet Connectivity Options: Internet access is perhaps one of the most admired services that

Game playing - artificial intelligence, Game Playing: We have now disp...

Game Playing: We have now dispensed with the necessary background material for AI problem solving techniques, and we just considered to looking at particular types of problems

Explain the drawback of top down parsing of backtracking, Write down the dr...

Write down the drawback of top down parsing of backtracking. Following are disadvantages of top down parsing of backtracking: (i) Semantic actions can't be performed whereas

Explain speedup performance and issues in pipelining, Speedup First, we...

Speedup First, we take the speedup factor which is we see how much speed up performance we achieve by pipelining. First we take ideal case for measuring the speedup. Let n b

Time slice, The Linux Process Scheduler uses time slice to prevent a single...

The Linux Process Scheduler uses time slice to prevent a single process from using the CPU for too long. A time slice specifies how long the process can use the CPU. In our simulat

What is EDO RAM, What is EDO RAM A minor modification to the structure ...

What is EDO RAM A minor modification to the structure of the DRAM changes the device into an EDO (extended data output) DRAM device. In EDO memory, any memory access, including

Nor gate, The NOR gate. The NOR gate is equivalent to an OR gate follow...

The NOR gate. The NOR gate is equivalent to an OR gate followed by a NOT gate so that the output is at logic level 0 when any of the inputs are high otherwise it is at logic le

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd