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The micro-instruction cycle can comprises two basic cycles: the fetch and execute. Here in the fetch cycle address of micro-instruction is produced and this micro-instruction is put in a register used for address of a micro-instruction for execution. Execution of a micro-instruction simply means production of control signals. These control signals can drive CPU (internal control signals) or system bus. Format of micro-instruction and its contents decide the complexity of a logic module that executes a micro-instruction.
One of the major features incorporated in a micro-instruction is encoding of micro-instructions. What is encoding of micro-instruction? For answering this question let's recall Wilkes control unit. In Wilkes control unit every bit of information either produces a control signal or form a bit of subsequent instruction address. Now let's presume that a machine requires N total number of control signals. If we follow Wilkes scheme we need N bits one for each control signal in CU.
The commercially available 8-input multiplexer integrated circuit in the TTL family is ? Ans. In TTL, MUX integrated circuit is 74153.
A Network uses a star topology if? A Network utilizes a star topology if all computers attach to a single central point.
What is a Shift Register? Ans: Shift Register: A register wherein data finds shifted towards left or right while clock pulses are applied is termed as a Shift Register.
What are the roll and page areas? Roll and page areas are SAP R/3 buffers used to kept user contexts (process requests). The SAP dispatcher assigns procedure requests to work
Synchronized with a clock signal Memory system considerations Speed Cost Size of chip Power dissipation Memory controller Refresh Overhead
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what is equivalence partition
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