Ending transactions - data phase, Computer Engineering

Assignment Help:

Ending transactions:

Either side may request that a burst end after the present data phase. Simple PCI component that do not support multi-word bursts will always request this instantaneously. Even devices that do support bursts will have some restriction on the maximum length they can support, like as the end of their addressable memory.

The initiator can mark any data phase as the last one in a transaction by deserting FRAME# at the same time as it asserts IRDY#. The cycle after the target asserts TRDY#, the last data transfer is complete, both sides dessert their individual RDY# signals, and the bus is make idle again. The master may not dessert FRAME# before asserting IRDY#, nor may it assert FRAME# whereas it waiting, with IRDY# asserted, for the target to assert TRDY#.

The only minor exception is a master abort termination is happen when no target responds with DEVSEL#. Clearly, it is useless to wait for TRDY# in such type of case. However, even in this case, the master has to assert IRDY# for at least 1 cycle after deserting FRAME#. (Usually, a master will assert IRDY# before retain DEVSEL#, so it have to simply hold IRDY# asserted for 1 cycle longer.) It is to ensure that bus turnaround timing rules are obeyed on the FRAME# line.

The target requests the initiator end a burst by asserting STOP#. The initiator will then finish the transaction by deserting FRAME# at the next legal chance. If it desires to transfer any more data, it will continue in a separate transaction. There are various ways to do this:

Disconnect with data

If the target asserts TRDY # and STOP # at the same time, it indicates that the target wishes this to be the last data phase. For instance, a target that does not support burst transfers will always do it to force single-word PCI transactions. It is the most efficient way for a target to stop a burst.

Disconnect without data

If the target asserts STOP# without asserting TRDY#, it indicates that the target desire to stop without transferring data. STOP# is considered corresponding to TRDY# for the purpose of ending a data phase, but data is not transferred.

Retry

A Disconnection without data before transferring any data is a retry and unlike other type PCI transactions, PCI initiators are needed to pause slightly before continuing the operation. Observe the PCI specification for details.


Related Discussions:- Ending transactions - data phase

Define e-commerce, Define e-commerce? The term 'electronic commerce' ha...

Define e-commerce? The term 'electronic commerce' has develop from electronic shopping, to imply all aspects of business and market processes enabled by the Internet and World

Define process of instruction execution, Instruction execution is performed...

Instruction execution is performed in CPU registers. Although before we define process of instruction execution let's first give details on Registers (temporary storage location in

What is associative search, What is associative search? The cost of an ...

What is associative search? The cost of an associative cache is higher that the cost of a direct mapped cache due to the need to search all 128 bit tag patterns to verify wheth

Signed 1’s complement representation, Q. Signed 1s complement representatio...

Q. Signed 1s complement representation? Another possibility that is also simple is use of signed 1's complement. Signed 1's complement has a principal. Add both numbers includi

What must the requirement of designer to get memory capacity, In applicatio...

In applications where the required memory capacity cannot be satisfied by a single available memory IC chip, what should the designer do to meet this requirement? Ans: If th

Software engineering, #quest2. Each time a defect gets detected and fixed, ...

#quest2. Each time a defect gets detected and fixed, the reliability of a software production..

What are the types of parallel programming, Q. What are the types of parall...

Q. What are the types of parallel programming? There are various parallel programming models in general use. A few of them are:  Data Parallel programming Message P

Interpreted language and a compiled language, Difference between an interpr...

Difference between an interpreted language and a compiled language? Ans) A compiled language is written and then run by a compiler which checks its syntax and compresses it int

Instruction of a micro-program, Q. Instruction of a micro-program? A mi...

Q. Instruction of a micro-program? A micro-instruction is an instruction of a micro-program. It specifies one or more than one micro-operations that can be executed concurrentl

Connectives - first-order logic , Connectives - first-order logic: We ...

Connectives - first-order logic: We can string predicates all together in a sentence by using connectives into the same way to conduct that we did for propositional logic. We

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd