DIV: Unsigned Division:- This instruction performs unsigned division operation. It divides an unsigned word or double word by a 16-bit or 8-bit operand. The dividend might be in the register AX for 16-bit operation and divisor might be specified  by using any one of the addressing modes accept immediate. The result will be in the register AL (quotient) while register AH will contain the remainder. If the result is too big to fit in register AL, type 0 (divide by zero) interrupt is produced. In case of a double word dividend (32-bit), the higher word should be in register DX and lower word should be in the register AX. The divisor might be specified as already explained. The remainder and quotient , in this type of case, will be in AX and DX respectively. This instruction does not make any affect on any flag.

IDIV:  Signed Division:- This instruction performs the similar  operation  as the DIV  instruction, but with signed operands. The results are stored similarly as in case of DIV instruction in both cases of word and double word divisions. The results will be also signed numbers. The operands are also specified in the similar way as DIV instruction. Divide by 0 interrupt is produced, if the result is too big to fit in register AX (16-bit dividend operation) or register AX and register DX (32-bit  dividend  operation). All the flags are undefined after IDIV instruction.