Determine the logic gate having input 0 and output 1, Computer Engineering

Assignment Help:

The output of a logic gate is 1 when all its inputs are at logic 0. The gate is either ?

Ans. When all inputs of logic gate at logic 0 and output is 0. The gate is either a NOR or an EX-NOR. The truth tables for both NOR and EX-NOR Gates are demonstrated in fig.(a) and (b).

Input

A     B

Output

Y

0      0

1

0      1

0

1      0

0

1      1

0

Fig.(a) Truth Table for NOR Gate

555_Determine the logic gate.png

  Fig.(b) Truth Table for EX-NOR Gate


Related Discussions:- Determine the logic gate having input 0 and output 1

What is a message passing system, Distributed System 1. What is a messa...

Distributed System 1. What is a message passing system? Discuss the desirable features of a message passing system. 2. Discuss the implementation of RPC Mechanism in detail.

Truth tables, Any function can be expressed in a truth table.A truth table ...

Any function can be expressed in a truth table.A truth table lists all possible combinations ofinputs and gives the output produced in eachcase.Truth tables must include all combin

Explain various classes of datatypes of c, Explain various classes of datat...

Explain various classes of datatypes of C   Following are the main classes of data types in C language: 1.  Primary data types: Also called as fundamental/basic data types

What are sewing kits, What are Sewing Kits? Sewing Kits are modules whi...

What are Sewing Kits? Sewing Kits are modules which contain a not used mix of gates, any other cells or flip-flops considered potentially helpful for an unforeseen metal fix. W

Input, what is an input?

what is an input?

Basic elements of assembly language, Basic elements of  Assembly language:...

Basic elements of  Assembly language: Any Assembly language which consists 3 types of instruction statements that are used to define the program operations: Data secti

Translator for low level programming language, Translator for low level pro...

Translator for low level programming language were called as    Assembler

Designing logic circuits, When designing a logic circuit with multipleoutpu...

When designing a logic circuit with multipleoutputs it is usual to treat it as several circuitseach with one output. So for our example wewould design three circuits; one with outp

Distinguish between an agent system and an expert system, Problem : (a)...

Problem : (a) The concept of an agent is generally defined by listing the properties that agents exhibit. Identify and describe the properties that you would associate with th

Explain the design reusability of verilog, Explain the Design reusability o...

Explain the Design reusability of Verilog There is no concept of packages in Verilog. Functions and procedures used within a model should be  defined  in  the  module.  To  mak

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd