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Q. Describe the instruction set architecture?
The significant role of the Central Processing Unit (CPU) is to perform calculations, to coordinate all other hardware components, to issue the commands and executing programs including operating system and application programs etc. on your computer. Though CPU is primarily the core hardware component; you have to speak to it in core binary machine language. The words of a machine language are termed as instructions and its syntax is called an instruction set.
Fig: The Instruction Set Viewpoints
Give difference between top down parsing and bottom up parsing. Top down parsing: Specified an input string, top down parsing tries to derive a string identical to this by s
What are the types of pipeline hazards? The various pipeline hazards are: 1. Data hazard 2. Structural Hazard 3. Control Hazard.
TRP is the number of clock cycles required to terminate access to an open row of memory, and open access to the next row. It stand for row precharge time.
Q. Define Interrupt Processing? On completion of execution of an instruction machine checks whether there is any pending interrupt request for interrupts which are enabled. If
Implement the following function using a 3 line to 8 line decoder. S (A,B,C) = ∑ m(1,2,4,7) C (A,B,C) = ∑ m ( 3,5,6,7) Ans. Given function S (A,B,C) = m (1,2,4,7)
The CCITT standard bandwidth for speech is: (A) 20000 Hz (B) 15000 Hz (C) 7000 Hz (D) 3400 Hz Ans:
What are the disadvantages of Public Key Cryptography? Disadvantages of Public Key Cryptography are as given below: a) It is used to encrypt a secret key that is used to e
1. A Bayesian network is shown for the variables paper Thickness, paper Alignment and Print Quality. The conditional probabilities are provided in the tables beside the nodes. Here
Explain the multiple bus organization structure with neat diagram. The multiple bus organization is using more buses instead of one bus to decrease the number of steps needed an
Q. Explain functions of direct memory access? Though CPU intervention in DMA is minimised however it should use path between interfaces that is system bus. So DMA involves an e
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