Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. Describe Program Control Instructions?
These instructions specify conditions for altering the sequence of program execution or we can say in other words that the content of PC (program counter) register. PC points to memory location which holds the subsequent instruction to be executed. The alteration in value of PC as a result of execution of control instruction such as BRANCH or JUMP causes a break in sequential execution of instructions. The most common control instructions are as following:
JUMP and BRANCH may be unconditional or conditional. JUMP is an unconditional branch used to implement simple loops. JNE jump not equal is conditional branch instruction. The conditional branch instructions like BRP X and BRN X causes a branch to memory location X if the result of most recent operation is positive or negative correspondingly. If the condition is true PC is loaded with branch address X and next instruction is taken from X otherwise PC is not changed and the subsequent instruction is taken from location pointed by PC. Figure below displays an unconditional branch instruction and a conditional branch instruction if content of AC is zero.
MBR←0; Assign 0 to MBR register
X←2001; Assume X to be an address location 2001
READ X; Read a value from memory location 2001 into AC
BRZ 1007; Branch to location 1007 if AC is zero (Conditional branch on zero)
ADD MBR; add the content of MBR to AC and store result to AC
TRAS MBR; Transfer the contents of AC to MBR
INC X; Increment X to point to next location
JUMP 1001;Loop back for further processing.
E xplain the working of thousand line exchanges by u sing a combination of uniselectors and two motion selectors. The schematic diagram for such an exchange is demonstrated i
Define SR Flip Flop - SR latch with NOR Gate? The SR Flip flop neither is a circuit with two cross-coupled NOR gates or two cross-coupled NAND gates. SR
Scientific Applications/Image processing Major of concurrent processing applications from science and other academic disciplines, are mostly have based on numerical simulations
Harvard mark i and the bug The next important effort towards devising an electromechanical computer was done at the harvard University, jointly sponsored by the Department of U
Write an HTML program segment that contains hypertext links from one document to another . HTML permits any item to be placed as a hypertext reference. Therefore a single word
Static modeling is used to state structure of the objects that are in the problem domain. These are expressed using class, object and USECASE diagrams. But Dynamic modeling sig
Define Hit ratio. The performance of cache memory is frequently measured in terms of quantity called hit ratio. Hit-Find a word in cache. Miss-Word is not found in cache.
What is reentrant tasks and functions Tasks and functions without optional keyword automatic are static , with all declared items being statically allocated. These items will b
WHAT IS CPE
What is associative search? The cost of an associative cache is higher that the cost of a direct mapped cache due to the need to search all 128 bit tag patterns to verify wheth
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd