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Q. Describe about Immediate Addressing mode?
When an operand is interpreted as an immediate value for example LOAD IMMEDIATE 7 it is actual value 7 which is put in CPU register. In this mode operand is the data in operand address field of instruction. Subsequently there is no address field at all and henceforth no extra memory accesses are needed for executing this instruction. Or we can say that in this addressing scheme the actual operand D is A the content of operand field: it implies that D = A. The effective address in this case isn't defined:
Figure: Immediate Addressing
benefit of hardware protection
define harvard and princeton architecture
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Define class P The class of all sets L that can be known in polynomial time by deterministic TM. The class of all decision problems that can be decided in polynomial time.
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Error detection mechanism may include checking mechanical and data communication errors. These errors must be reported to processor. The illustrations of kind of mechanical errors
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