Define wilkes control unit, Computer Engineering

Assignment Help:

Q. Define Wilkes Control Unit?

Prof. M. V. Wilkes of the Cambridge University Mathematical Laboratory invented the term microprogramming in 1951. He offered a systematic alternative process for designing control unit of a digital computer. At the time of instruction executing a machine instruction, a sequence of transformations and transfer of information from one register in processor to another take place. These were also known as the micro operations. Due to the analogy between the executions of individual steps in a machine instruction to execution of individual instruction in a program. Wilkes introduced the idea of microprogramming. Wilkes control unitreplaces the combinational and sequential circuits of hardwired CU by a simple CU in conjunction with a storage unit which stores the sequence of steps of instruction which is a micro-program.

In Wilkes microinstruction has two main components:

a)  Control field thatdenotes the control lines which are to be activated and

b)  Address field that provides address of the subsequent microinstruction to be executed.

The figure below is an illustration of Wilkes control unit design. 

1315_Define Wilkes Control Unit.png

Figure: Wilkes Control Unit

The control memory in Wilkes control is organized like a PLA's like matrix made of diodes. This is partial matrix and comprises two components the control signals and address of the subsequent micro-instruction. Register I comprises the address of next micro-instruction which is one step of instruction execution, for illustration T1 in M1 or T2 in M2 etc. as in Figure below. On decoding the control signals are producedwhich cause execution of micro-operation(s) of that step. Additionally the control unit denotes the address of next micro-operation that gets loaded through register II to register I. Register I can also be loaded by register II and enable IR input control signal. This will pass address of first micro-instruction of execute cycle. At the time of a machine cycle one row of the matrix is triggered. The first portion of the row produces the control signals which control the operations of the processor. Second part produces the address of row to be selected in next machine cycle. 

At beginning of the cycle the address of the row to be selected is contained in register I. This address is input to decoder that is activated by a clock pulse.

This triggers the row of control matrix. Two-register arrangement is required as the decoder is a combinational circuit; with only one register output would become input at the time of a cycle. This can be an unstable condition because of repetitive loop.


Related Discussions:- Define wilkes control unit

what is ecc memory, Error-correcting code memory (ECC memory) is a type of...

Error-correcting code memory (ECC memory) is a type of computer data storage that can notice and correct the more general kinds of internal data corruption. ECC memory is used in m

Explain traditional computer clusters, Q. Explain traditional computer clus...

Q. Explain traditional computer clusters? Grid computing employs resources of a lot of separate computers linked by a network (generally internet) to resolve large-scale comput

Difference between reply-to and return-path , What is the difference betwee...

What is the difference between Reply-to and Return-path in the headers of a mail function? Ans) Reply-to: Reply-to is where to deliver the respond of the mail. Return-pat

Illustrate master-slave flip-flop, Q. Illustrate Master-Slave Flip-Flop? ...

Q. Illustrate Master-Slave Flip-Flop? Master slave flip-flop comprise two flip-flops. One is master flip-flop and other one is known as slave flip-flop. Fig below shows impleme

Explain the optimization of data access paths, Explain the Optimization of ...

Explain the Optimization of data access paths Optimization is a very significant aspect of any design. The designer must do the followings for optimization: i) Add redundan

Parallel random access machines, PRAM is one among the models which are use...

PRAM is one among the models which are used for designing the parallel algorithm as shown in Figure. The PRAM model comprises the following components: i)  A group of identical

What is a binary tree, What is a binary tree? A binary tree 'T' is desc...

What is a binary tree? A binary tree 'T' is described as A finite set of elements, known as nodes, such that: either (i) or (ii) happens: (i) T is empty (known as the 'nu

Determine about the intranet server, Determine about the Intranet server ...

Determine about the Intranet server The success or usage of the Intranet server is measured by the number of operations it handles per Unit time. The selection of a good server

Proof by contradiction - artificial intelligence, Proof by Contradiction - ...

Proof by Contradiction - Artificial intelligence So, both backward chaining andforward chaining have drawbacks. Another approach is to think regarding proving theorems by contr

Illustrate high performance fortran, In 1993 High Performance FORTRAN Forum...

In 1993 High Performance FORTRAN Forum which is a group of academicians and many leading software and hardware vendors in field of parallel processing established an informal langu

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd