Computer architecture basics, Computer Engineering

Assignment Help:

Computer Architecture Basics:

Some of computer architecture at companies such like AMD and Intel uses more fine distinctions:

  • Macro architecture- this is an architectural layer that are more abstract than micro architecture, for example. ISA
  • ISA (Instruction Set Architecture) -it's already defined above
  • Assembly ISA - it is a smart assembler can convert an abstract assembly language common to a group of machines into slightly different machine language for different implementations
  • Programmer Visible Macro architecture- it is higher level language tools like as compilers may define a consistent interface or contract to programmers by using them, abstracting differences between UISA ,underlying ISA, , and micro architectures for example. The C, C++, or Java standards describe different Programmer Visible Macro architecture - even though in practice the C micro architecture for a specific computer includes
  • UISA (Microcode Instruction Set Architecture) -it is a family of machines having different hardware level micro architectures may share a common microcode architecture, and therefore a UISA.
  • Pin Architecture -it is a set of functions that a microprocessor is likely to provide, from the point of view of a hardware platform For example. FERR/IGNNE ,the x86 A20M, or FLUSH pins, and the messages that the processor is likely to produce after completing a cache invalidation so that external caches can be invalidated. Pin architecture functions are more supple than ISA functions - external hardware may adapt to changing encodings, or changing from a pin to a message - but the functions are expected to be provided in successive implementations even if the way of encoding them changes.

 

 


Related Discussions:- Computer architecture basics

Data phases - computer architecture, Data phases: After the address ph...

Data phases: After the address phase (particularly, starting with the cycle that DEVSEL# goes low) comes a burst of one or more data phases. In all the cases, initiator drives

Using bit wise operator implement nor and nand gate, Q. Write a program t...

Q. Write a program to implement NOR, NAND, XOR and XNOR gates using and without using bit wise operator. Also perform necessary checking. The user has option to give n numbe

List the acid properties, a. List the ACID properties. Describe the usefuln...

a. List the ACID properties. Describe the usefulness of each. b. During its implementation, a transaction passes by several states, until it finally commits or aborts. List all

E-commerce in the market, Considering the fact that a lot of research has b...

Considering the fact that a lot of research has been done concerning e-commerce, what has been brought in this work is that there has been a lot of facts, studies, and experiments.

Evidence of intelligent behavior - artificial intelligence, Evidence of int...

Evidence of intelligent behavior - Artificial Intelligence: Machines mean they could simply be personal computers, or they could be robots with embedded automative systems, or

What is a snooping cache, DNS cache snooping is not a term the author just ...

DNS cache snooping is not a term the author just made up, it is called and discussed by some notable DNS execution developers, and a few interested DNS administrators have prob

Embedded, explain djnz instruction of intel 8051 microcontroler

explain djnz instruction of intel 8051 microcontroler

Asynchronous and Synchronous types of serial communication, Differentiate b...

Differentiate between asynchronous and synchronous types of serial communication. Serial data communication uses two fundamental types, asynchronous andsynchronous. With synchr

The advantages of specifying parameters during instantiation, The advantage...

The advantages of specifying parameters during instantiation method are: -  All values to all the parameters do not need to be specified. Only those parameters that are assigne

What is paging unit, Paging Unit Paging mechanism functions with 4K -...

Paging Unit Paging mechanism functions with 4K - byte memory pages or with a new extension available to Pentium with 4M byte-memory pages. In the Pentium, with the new 4M-byt

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd