Comparison between risc and cisc - computer architecture:

Though, the RISC strategy also brings some very significant advantages. Because each instruction need only one clock cycle to execute, the whole program will execute in about the same amount of time as the multi-cycle "MULT" command. These RISC "reduced instructions" needed less transistors of hardware space than the multifaceted instructions, leaving more space for general purpose registers. Because all of the instructions execute in a uniform amount of time (for example: one clock), pipelining is possible.

Separating the "STORE" and "LOAD " instructions in fact reduce the amount of work that the computer have to perform. After the execution of CISC-style "MULT" command, the processor automatically clear the registers. If one of the operands required to be used for another computation, the processor has to re-load the data from the memory bank into a register. In RISC, the operand will leave in the register until another value is loaded in its place.